Accelerating Sobel Edge Detection Using Compressor Cells Over FPGAs

2017 ◽  
pp. 1-21
Author(s):  
Ahmed Abouelfarag ◽  
Marwa Ali Elshenawy ◽  
Esraa Alaaeldin Khattab
Keyword(s):  
Edge Detection ◽  
Real Time ◽  
Video Processing ◽  
High Level Synthesis ◽  
Computational Time ◽  
The Novel ◽  
Image And Video Processing ◽  
Sobel Edge Detection ◽  
High Level ◽  
Time Image

Recently, computer vision is playing an important role in many essential human-computer interactive applications, these applications are subject to a “real-time” constraint, and therefore it requires a fast and reliable computational system. Edge Detection is the most used approach for segmenting images based on changes in intensity. There are various kernels used to perform edge detection, such as: Sobel, Robert, and Prewitt, upon which, the most commonly used is Sobel. In this research a novel type of operator cells that perform addition is introduced to achieve computational acceleration. The novel operator cells have been employed in the chosen FPGA Zedboard which is well-suited for real-time image and video processing. Accelerating the Sobel edge detection technique is exploited using different tools such as the High-Level Synthesis tools provided by Vivado. This enhancement shows a significant improvement as it decreases the computational time by 26% compared to the conventional adder cells.

Accelerating Sobel Edge Detection Using Compressor Cells Over FPGAs

2018 ◽  
pp. 1133-1154
Author(s):  
Ahmed Abouelfarag ◽  
Marwa Ali Elshenawy ◽  
Esraa Alaaeldin Khattab
Keyword(s):  
Edge Detection ◽  
Real Time ◽  
Video Processing ◽  
High Level Synthesis ◽  
Computational Time ◽  
The Novel ◽  
Image And Video Processing ◽  
Sobel Edge Detection ◽  
High Level ◽  
Time Image

Recently, computer vision is playing an important role in many essential human-computer interactive applications, these applications are subject to a “real-time” constraint, and therefore it requires a fast and reliable computational system. Edge Detection is the most used approach for segmenting images based on changes in intensity. There are various kernels used to perform edge detection, such as: Sobel, Robert, and Prewitt, upon which, the most commonly used is Sobel. In this research a novel type of operator cells that perform addition is introduced to achieve computational acceleration. The novel operator cells have been employed in the chosen FPGA Zedboard which is well-suited for real-time image and video processing. Accelerating the Sobel edge detection technique is exploited using different tools such as the High-Level Synthesis tools provided by Vivado. This enhancement shows a significant improvement as it decreases the computational time by 26% compared to the conventional adder cells.

AN EFFICIENT FPGA OVERLAY FOR COLOR TRANSFORMATION FUNCTION USING HIGH LEVEL SYNTHESIS

2021 ◽  
Vol 9 (1) ◽  
pp. 280-287
Author(s):  
Minal Deshmukh, Prasad Khandekar, Nishikant Sadafale
Keyword(s):  
Image Processing ◽  
Real Time ◽  
Transformation Function ◽  
High Level Synthesis ◽  
Smart Devices ◽  
Real Time Image Processing ◽  
Real Time Image ◽  
Color Transformation ◽  
High Level ◽  
Time Image

Image Processing is a significantly desirable in commercial, industrial, and medical applications. Processor based architectures are inappropriate for real time applications as Image processing algorithms are quite intensive in terms of computations. To reduce latency and limitation in performance due to limited amount of memory and fixed clock frequency for synthesis in processor-based architecture, FPGA can be used in smart devices for implementing real time image processing applications. To increase speed of real time image processing custom overlays (Hardware Library of programmable logic circuit) can be designed to run on FPGA fabric. The IP core generated by the HLS (High Level Synthesis) can be implemented on a reconfigurable platform which allows effective utilization of channel bandwidth and storage. In this paper we have presented FPGA overlay design for color transformation function using Xilinx’s python productivity board PYNQ-Z2 to get benefit in performance over a traditional processor. Performance comparison of custom overlay on FPGA and Processor based platform shows FPGA execution yields minimum computation time.

scholarly journals A High-Level Synthesis Implementation and Evaluation of an Image Processing Accelerator

Technologies ◽  
2018 ◽  
Vol 7 (1) ◽  
pp. 4
Author(s):  
Dimitris Tsiktsiris ◽  
Dimitris Ziouzios ◽  
Minas Dasygenis
Keyword(s):  
Image Processing ◽  
Edge Detection ◽  
Digital Image Processing ◽  
Digital Image ◽  
High Level Synthesis ◽  
Bare Metal ◽  
Sobel Edge Detection ◽  
High Level ◽  
Graphics Processing ◽  
Better Than

Most frequently, an FPGA is used as an implementation platform in applications of graphics processing, as its structure can effectively exploit both spatial and temporal parallelism. Such parallelization techniques involve fundamental restrictions, namely being their dependence on both the processing model and the system’s hardware constraints, that can force the designer to restructure the architecture and the implementation. Predesigned accelerators can significantly assist the designer to solve this problem and meet his deadlines. In this paper, we present our accelerators for Grayscale and Sobel Edge Detection, two of the most fundamental algorithms used in digital image processing projects. We have implemented those algorithms with a “bare-metal” VHDL design, written purely by hand, as a portable USB accelerator device, as well as an HLS-based overlay of a similar implementation designed to be used by a Python interface. The comparisons of the two architectures showcase that the HLS generated design can perform equally to or even better than the handwritten HDL equivalent, especially when the correct compiler directives are provided.

The Research of Real-Time Image Acquisition and Sobel Edge Detection with FPGA

2011 ◽  
Vol 467-469 ◽  
pp. 703-708
Author(s):  
Yang Xu ◽  
Ping Li ◽  
Jian Jun Yuan ◽  
Min Xiang
Keyword(s):  
Edge Detection ◽  
Real Time ◽  
High Speed ◽  
Design Method ◽  
Image Acquisition ◽  
Detection Algorithm ◽  
The Real ◽  
Real Time Image ◽  
Sobel Edge Detection ◽  
Time Image

As the real-time image acquiring and processing need to be dealt with high speed, a image acquisition and preprocessing system is discussed in this paper. It is built on FPGA( field programmable gate array ) with pipelined and parallel technology. The configurable macro function modules provided by Altera company achieve the Sobel edge detection algorithm. The real-time display the image after edge detection works properly and The new design method shorten the development cycle.

scholarly journals Real Time Sobel Edge Detection Based on Reconfigurable Computing

2020 ◽  
Vol 8 (5) ◽  
pp. 2466-2468
Keyword(s):  
Edge Detection ◽  
Real Time ◽  
Video Processing ◽  
Reconfigurable Computing ◽  
Crack Detection ◽  
Traffic Monitoring ◽  
Lane Detection ◽  
Verilog Hdl ◽  
Detection Algorithms ◽  
Sobel Edge Detection

Edge detection is a fundamental operation in many image and video processing applications. It is used in various fields like industries, aerospace, surveillance, medical fields, traffic monitoring system, lane detection, driverless vehicles, crack detection in roads and several other applications. Most of the edge detection algorithms are software based but in real time applications these are not efficient hence in this paper we have explored about Hardware platform. The reason for selecting Sobel edge detection operator is it incorporates both the edge detection and a smoothing operator to provide good edge detection capability in noisy environment. This design uses Verilog HDL language for design and Vivado is used for simulation.

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