Formal Plausibility Checks for Environment Constraints

Lecture Notes in Electrical Engineering - Models, Methods, and Tools for Complex Chip Design ◽

10.1007/978-3-319-01418-0_1 ◽

2013 ◽

pp. 1-16

Author(s):

Binghao Bao ◽

Jörg Bormann ◽

Markus Wedler ◽

Dominik Stoffel ◽

Wolfgang Kunz

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