AIDA-C Architecture

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects ◽

10.1007/978-3-319-42037-0_3 ◽

2016 ◽

pp. 39-61

Author(s):

Nuno Lourenço ◽

Ricardo Martins ◽

Nuno Horta

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