Semiconductor Failure Analysis Using EBIC and XFIB

2001 ◽  
Vol 7 (S2) ◽  
pp. 514-515 ◽  
Author(s):  
Larry Rice
Keyword(s):  
Electron Beam ◽  
Failure Analysis ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Incident Beam ◽  
Yield Enhancement ◽  
Common Term ◽  
Electron Beam Induced Current

Electron beam induced current (EBIC) is the common term used in the semiconductor industry for the failure analysis and yield enhancement of semiconductor devices using SEM to electrically pinpoint leakage sites. EBIC is a useful technique for locating defects in diodes, transistors, and capacitors where the scanning electron microscope beam is used to generate a signal and the sample is the detector. Often during yield enhancement efforts the failure analyst is asked to determine the mechanism for which a PC structure (which may contain as many as a few hundred thousand structures in one device) is failing tests. Blind cross sections rarely give evidence of the failure mechanism. EBIC can be used to pinpoint the bad site which is then precision cross-sectioned using the focused ion beam (FIB).When an electron beam impinges on a semiconductor such as silicon, electron-hole pairs are created when the incident beam transfers enough energy to promote an electron from the valance band to the conduction band.

Direct Imaging of Device Characteristics In a Focused ion Beam System

1998 ◽  
Vol 4 (S2) ◽  
pp. 652-653 ◽  
Author(s):  
A. N. Campbell ◽  
J. M. Soden
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Material Removal ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Yield Enhancement ◽  
The Past ◽  
Design Changes ◽  
Design Debugging

A great deal can be learned about integrated circuits (ICs) and microelectronic structures simply by imaging them in a focused ion beam (FIB) system. FIB systems have evolved during the past decade from something of a curiosity to absolutely essential tools for microelectronics design verification and failure analysis. FIB system capabilities include localized material removal, localized deposition of conductors and insulators, and imaging. A major commercial driver for FIB systems is their usefulness in the design debugging cycle by (1) rewiring ICs quickly to test design changes and (2) making connection to deep conductors to facilitate electrical probing of complex ICs. FIB milling is also used for making precision cross sections and for TEM sample preparation of microelectronic structures for failure analysis and yield enhancement applications.

Yield Enhancement Study: Process Variation and Design Margins Leading to Timing Issues in the RAM

2000 ◽  
Author(s):  
Srikanth Perungulam ◽  
Scott Wills ◽  
Greg Mekras
Keyword(s):  
Cross Sections ◽  
Digital Signal Processor ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Random Access ◽  
Digital Signal ◽  
Yield Enhancement ◽  
Final Conclusion ◽  
Stage Separation ◽  
Study Process

Abstract This paper illustrates a yield enhancement effort on a Digital Signal Processor (DSP) where random columns in the Static Random Access Memory (SRAM) were found to be failing. In this SRAM circuit, sense amps are designed with a two-stage separation and latch sequence. In the failing devices the bit line and bit_bar line were not separated far enough in voltage before latching got triggered. The design team determined that the sense amp was being turned on too quickly. The final conclusion was that a marginal sense amp design, combined with process deviations, would result in this type of failure. The possible process issues were narrowed to variations of via resistances on the bit and bit_bar lines. Scanning Electron Microscope (SEM) inspection of the the Focused Ion Beam (FIB) cross sections followed by Transmission Electron Microscopy (TEM) showed the presence of contaminants at the bottom of the vias causing resistance variations.

Failure Analysis Strategies for Multistacked Memory Devices with TSV Interconnects

2015 ◽  
Author(s):  
Frank Altmann ◽  
Christian Grosse ◽  
Falk Naumann ◽  
Jens Beyersdorfer ◽  
Tony Veches
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Memory Devices ◽  
Metallographic Cross Section ◽  
Electron Beam Induced Current ◽  
Thermal Simulations ◽  
Lock In ◽  
Non Destructive

Abstract In this paper we will demonstrate new approaches for failure analysis of memory devices with multiple stacked dies and TSV interconnects. Therefore, TSV specific failure modes are studied on daisy chain test samples. Two analysis flows for defect localization implementing Electron Beam Induced Current (EBAC) imaging and Lock-in-Thermography (LIT) as well as adapted Focused Ion Beam (FIB) preparation and defect characterization by electron microscopy will be discussed. The most challenging failure mode is an electrical short at the TSV sidewall isolation with sub-micrometer dimensions. It is shown that the leakage path to a certain TSV within the stack can firstly be located by applying LIT to a metallographic cross section and secondly pinpointing by FIB/SEM cross-sectioning. In order to evaluate the potential of non-destructive determination of the lateral defect position, as well as the defect depth from only one LIT measurement, 2D thermal simulations of TSV stacks with artificial leakages are performed calculating the phase shift values per die level.

Combined Electron Beam Induced Current Imaging (EBIC) and Focused Ion Beam (FIB) Techniques for Thin Film Solar Cell Characterization

2010 ◽  
Author(s):  
Frank Altmann ◽  
Jan Schischka ◽  
Vinh Van Ngo ◽  
Stacey Stone ◽  
Laurens F. Tz. Kwakman ◽  
...  
Keyword(s):  
Thin Film ◽  
Electron Beam ◽  
Focused Ion Beam ◽  
Surface Defects ◽  
Ion Beam ◽  
Three Dimensional ◽  
Region Of Interest ◽  
Induced Current ◽  
Large Area ◽  
Electron Beam Induced Current

Abstract A novel analytical method applying combined electron beam induced current (EBIC) imaging based on scanning electron microscopy (SEM) and focused ion beam (FIB) cross sectioning in a SEM/FIB dualbeam system is presented. The method is demonstrated in several case studies for process characterization and failure analysis of thin film technology based Solar cells, including Silicon (CSG), Cadmium Telluride (CdTe) and Copper Indium Selenide (CIS) absorbers. While existing techniques such as electro-, photoluminescence spectroscopy and lock-in thermography are able to locate the larger, electrically active defects reasonably fast on a large area, the FIB-SEM EBIC system is uniquely capable of detecting sub-micron, sub-surface defects and of analysing these defects in the same system. In combination with a FIB, the localized region of interest can be easily cross sectioned and additional EBIC analysis can be applied for a three dimensional analysis of the p/n junction.

Alleviating Sample Charging during FIB Operation

2015 ◽  
Author(s):  
Q. Liu ◽  
H.B. Kor ◽  
Y.W. Siah ◽  
C.L. Gan
Keyword(s):  
Electron Microscopy ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Semiconductor Device ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Milling Process ◽  
Front Side ◽  
Dual Beam ◽  
Transmission Electron

Abstract Dual-beam focused ion beam (DB-FIB) system is widely used in the semiconductor industry to prepare cross-sections and transmission electron microscopy (TEM) lamellae, modify semiconductor devices and verify layout. One of the factors that limits its success rate is sample charging, which is caused by a lack of conductive path to discharge the accumulated charges. In this paper, an approach using an insitu micromanipulator was investigated to alleviate the charging effects. With this approach, a simple front side semiconductor device modification was carried out and the corresponding stage current was monitored to correlate to the milling process.

scholarly journals Die Backside FIB Preparation for Identification and Characterization of Metal Voids

1999 ◽  
Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Milling Process ◽  
Plan View ◽  
Metal Interconnects

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.

Laser Ablation for Throughput Increase in Large Volume Semiconductor Failure Analysis Tasks

2020 ◽  
Author(s):  
Marek Tuček ◽  
Martin Búran ◽  
Rostislav Váňa ◽  
Lukáš Hladík ◽  
Jozef Vincenc Oboňa
Keyword(s):  
Laser Ablation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Process Time ◽  
Device Layer ◽  
Chemical Methods ◽  
Speed Up ◽  
Oled Display

Abstract As the semiconductor industry demands higher throughput for failure analysis, there is a constant need to rapidly speed up the sample preparation workflows. Here we present extended capabilities of the standard Xe plasma Focused Ion Beam failure analysis workflows by implementing a standalone laser ablation tool. Time-to-sample advantages of such workflow is shown on four distinct applications: cross-sectioning of a large solder ball, cross-sectioning of a deeply buried wire bond, cross-sectioning of the device layer of an OLED display, and removing the MEMS silicon cap to access underlying structures. In all of these workflows we have shown significant decrease in required process time while altogether avoiding the disadvantages of corresponding mechanical and chemical methods.

Studies of Buried Voids Capturing with e-Beam Inspection System and Confirmation with Physical Failure Analysis

2012 ◽  
Author(s):  
Hong Xiao ◽  
Ximan Jiang
Keyword(s):  
Electron Beam ◽  
Electron Microscope ◽  
Failure Analysis ◽  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Energetic Electron ◽  
Optical Microscope ◽  
Inspection System ◽  
Dual Beam

Abstract In this paper, a novel inspection mode of electron beam inspection (EBI) that can effectively detect buried voids in tungsten (W) plugs is reported for the first time. Buried voids in metal are a defect of interest (DOI) that cannot be captured by either optical inspection or traditional EBI modes. The detection of buried voids is achieved by using energetic electron beam (e-beam) with energy high enough to penetrate into metal and reach the buried void. By selecting desired secondary electrons to form the inspection images, strong contrast between the defective tungsten plugs and normal ones can be achieved. Failure analysis was performed on the DOI that is unique to this new EBI mode. After optical microscope locating and laser marking, we successfully recaptured DOI with scanning electron microscope (SEM) and capped the DOI with e-beam assisted platinum (Pt) deposition. Later a dual-beam focused ion beam (FIB) system was used to re-locate the Pt-capped DOI and prepare samples for transmission electron microscope (TEM). TEM images confirmed the unique DOI were buried voids in the metal plugs, which could affect resistance of interconnect in integrated circuit (IC) chip and impact the IC yield.

Failure Analysis of Flip Chip C4 Package Using Focused Ion Beam Milling Technique

2011 ◽  
Author(s):  
Lihong Cao ◽  
Loc Tran ◽  
Wallace Donna
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Cross Sections ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Failure Mechanisms ◽  
Organic Substrate ◽  
Dual Beam ◽  
Preparation Techniques

Abstract This article describes how Focused Ion Beam (FIB) milling methodology enhances the capability of package-level failure analysis on flip-chip packages by eliminating the artifacts induced by using conventional mechanical techniques. Dual- Beam Focused Ion Beam (DB FIB) cross sections were successful in detecting failure mechanisms related either to the die/C4 bump or package defect inside the organic substrate. This paper outlines detailed sample preparation techniques prior to performing the DB FIB cross-sections, along with case studies of DB FIB cross-sections.

Site Specific 2-D Implant Profiling Using FIB Assisted SCM

2002 ◽  
Author(s):  
Konrad Jarausch ◽  
John F. Richards ◽  
Lloyd Denney ◽  
Alex Guichard ◽  
Phillip E. Russell
Keyword(s):  
Electron Microscopy ◽  
Failure Analysis ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Two Dimensional ◽  
Semiconductor Technology ◽  
Site Specific ◽  
Analysis Techniques ◽  
Profiling Techniques

Abstract Advances in semiconductor technology are driving the need for new metrology and failure analysis techniques. Failures due to missing, or misregistered implants are particularly difficult to resolve. Two-dimensional implant profiling techniques such as scanning capacitance microscopy (SCM) rely on polish preparation, which makes reliably targeting sub 0.25 um structures nearly impossible.[1] Focused ion beam (FIB) machining is routinely used to prepare site-specific cross-sections for electron microscopy inspection; however, FIB induced artifacts such as surface amorphization and Ga ion implantation render the surface incompatible with SCM (and selective etching techniques). This work describes a novel combination of FIB machining and polish preparation that allows for site-specific implant profiling using SCM.

Sign in / Sign up

Export Citation Format

Share Document