Low-power 8-bit 5-GS/s digital-to-analog converter for multi-gigabit wireless transceivers

2012 ◽  
Vol 4 (3) ◽  
pp. 275-282 ◽  
Author(s):  
Behnam Sedighi ◽  
Mahdi Khafaji ◽  
Johann Christoph Scheytt

We present a method to realize a low-power and high-speed digital-to-analog converter (DAC) for system-on-chip applications. The new method is a combination of binary-weighted current cells and R-2R ladder and is specially suited for modern BiCMOS technologies. A prototype 5 GS/s DAC is implemented in 0.13 μm SiGe BiCMOS technology. The DAC dissipates 26 mW and provides an SFDR higher than 48 dB for output frequencies up to 1 GHz.


10.12737/2387 ◽  
2014 ◽  
Vol 6 (3) ◽  
pp. 32-34
Author(s):  
Рембеза ◽  
S. Rembeza ◽  
Кононов ◽  
V. Kononov

The formulated optimal requirements sectional bezkontaktni DAC. Considered are the main technological and frequency limitations sovovych DAC with low power consumption. Suggested 4-bit binary-weighted Zogby differential DAC architecture analogue circuit.





2000 ◽  
Vol 46 (3) ◽  
pp. 896-902 ◽  
Author(s):  
J. Takala ◽  
J. Rostrom ◽  
T. Vaaraniemi ◽  
H. Herranen ◽  
P. Ojala


2013 ◽  
Vol 677 ◽  
pp. 326-333
Author(s):  
Xue Wu ◽  
Wu Lu ◽  
Qi Guo

This Paper describes ionizing irradiation effects and annealing behavior on some commercial available CMOS high speed and high resolution Digital-to-Analog Converter —AD9742. AC and DC parameters are measured before and after radiation and annealing experiment. Results show that DC parameters are more sensitive than AC parameters, and all parameters are fully recovered after room-temperature and elevated-temperature annealing behaviors. Test facilities, results and analysis are presented in this paper in details.



2014 ◽  
Vol 11 (6) ◽  
pp. 20140132-20140132
Author(s):  
Hyo-jong Kim ◽  
Donghwan Seo ◽  
Byung-geun Lee


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