Low-power 8-bit 5-GS/s digital-to-analog converter for multi-gigabit wireless transceivers
2012 ◽
Vol 4
(3)
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pp. 275-282
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Keyword(s):
On Chip
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We present a method to realize a low-power and high-speed digital-to-analog converter (DAC) for system-on-chip applications. The new method is a combination of binary-weighted current cells and R-2R ladder and is specially suited for modern BiCMOS technologies. A prototype 5 GS/s DAC is implemented in 0.13 μm SiGe BiCMOS technology. The DAC dissipates 26 mW and provides an SFDR higher than 48 dB for output frequencies up to 1 GHz.
Keyword(s):
Keyword(s):
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Keyword(s):
2000 ◽
Vol 46
(3)
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pp. 896-902
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