scholarly journals 2022 roadmap on neuromorphic computing and engineering

2022 ◽  
Author(s):  
Dennis Valbjørn Christensen ◽  
Regina Dittmann ◽  
Bernabe Linares-Barranco ◽  
Abu Sebastian ◽  
Manuel Le Gallo ◽  
...  
Keyword(s):  
Power Consumption ◽  
Data Transfer ◽  
Research Area ◽  
Complex Data ◽  
Digital Information ◽  
Neuromorphic Computing ◽  
Neuromorphic Circuits ◽  
Von Neumann ◽  
The Future ◽  
Von Neumann Architecture

Abstract Modern computation based on the von Neumann architecture is today a mature cutting-edge science. In the Von Neumann architecture, processing and memory units are implemented as separate blocks interchanging data intensively and continuously. This data transfer is responsible for a large part of the power consumption. The next generation computer technology is expected to solve problems at the exascale with 1018 calculations each second. Even though these future computers will be incredibly powerful, if they are based on von Neumann type architectures, they will consume between 20 and 30 megawatts of power and will not have intrinsic physically built-in capabilities to learn or deal with complex data as our brain does. These needs can be addressed by neuromorphic computing systems which are inspired by the biological concepts of the human brain. This new generation of computers has the potential to be used for the storage and processing of large amounts of digital information with much lower power consumption than conventional processors. Among their potential future applications, an important niche is moving the control from data centers to edge devices. The aim of this Roadmap is to present a snapshot of the present state of neuromorphic technology and provide an opinion on the challenges and opportunities that the future holds in the major areas of neuromorphic technology, namely materials, devices, neuromorphic circuits, neuromorphic algorithms, applications, and ethics. The Roadmap is a collection of perspectives where leading researchers in the neuromorphic community provide their own view about the current state and the future challenges for each research area. We hope that this Roadmap will be a useful resource by providing a concise yet comprehensive introduction to readers outside this field, for those who are just entering the field, as well as providing future perspectives for those who are well established in the neuromorphic computing community.

scholarly journals Modeling and Simulation of Asynchrony in Neuromorphic Computing

2019 ◽  
Vol 8 (9) ◽  
pp. 676-685
Keyword(s):  
Neural Network ◽  
Human Brain ◽  
Hardware Implementation ◽  
Electronic System ◽  
Clock Generator ◽  
Asynchronous Circuit ◽  
Neuromorphic Computing ◽  
Von Neumann ◽  
Von Neumann Architecture ◽  
Computational Element

Neuromorphic computing is a non-von Neumann architecture which is also referred to as artificial neural network and that allows electronic system to function in the same manner as that of the human brain. In this paper we have developed neural core architecture analogous to that of the human brain. Each neural core has its own computational element neuron, memory to store information and local clock generator for synchronous functioning of neuron along with asynchronous input-output port and its port controller. The neuron model used here is a tailor-made of IBM TrueNorth’s neuron block. Our design methodology includes both synchronous and asynchronous circuit in order to build an event-driven neural network core. We have first simulated our design using Neuroph studio in order to calculate the weights and bias value and then used these weights for hardware implementation. With that we have successfully demonstrated the working of neural core using XOR application. It was designed in VHDL language and simulated in Xilinx ISE software.

scholarly journals Memristive Artificial Synapses for Neuromorphic Computing

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Wen Huang ◽  
Xuwen Xia ◽  
Chen Zhu ◽  
Parker Steichen ◽  
Weidong Quan ◽  
...  
Keyword(s):  
Brain Function ◽  
Neuromorphic Computing ◽  
Von Neumann ◽  
Optical Signals ◽  
Synaptic Functions ◽  
Neuromorphic Systems ◽  
Von Neumann Architecture ◽  
The Brain ◽  
Stimulation Of ◽  
Working Mechanisms

AbstractNeuromorphic computing simulates the operation of biological brain function for information processing and can potentially solve the bottleneck of the von Neumann architecture. This computing is realized based on memristive hardware neural networks in which synaptic devices that mimic biological synapses of the brain are the primary units. Mimicking synaptic functions with these devices is critical in neuromorphic systems. In the last decade, electrical and optical signals have been incorporated into the synaptic devices and promoted the simulation of various synaptic functions. In this review, these devices are discussed by categorizing them into electrically stimulated, optically stimulated, and photoelectric synergetic synaptic devices based on stimulation of electrical and optical signals. The working mechanisms of the devices are analyzed in detail. This is followed by a discussion of the progress in mimicking synaptic functions. In addition, existing application scenarios of various synaptic devices are outlined. Furthermore, the performances and future development of the synaptic devices that could be significant for building efficient neuromorphic systems are prospected.

scholarly journals Memristive and CMOS Devices for Neuromorphic Computing

Materials ◽  
2020 ◽  
Vol 13 (1) ◽  
pp. 166 ◽  
Author(s):  
Valerio Milo ◽  
Gerardo Malavena ◽  
Christian Monzio Compagnoni ◽  
Daniele Ielmini
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Low Power ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Neuromorphic Computing ◽  
Ultra Low Power ◽  
Von Neumann ◽  
Novel Device ◽  
Von Neumann Architecture

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

scholarly journals Spiking Neural Networks in Spintronic Computational RAM

2021 ◽  
Vol 18 (4) ◽  
pp. 1-21
Author(s):  
Hüsrev Cılasun ◽  
Salonik Resch ◽  
Zamshed I. Chowdhury ◽  
Erin Olson ◽  
Masoud Zabihi ◽  
...  
Keyword(s):  
Neural Networks ◽  
Energy Consumption ◽  
Data Transfer ◽  
Data Communication ◽  
Spiking Neural Networks ◽  
De Bruijn Graph ◽  
Promising Alternative ◽  
Von Neumann ◽  
Key Aspects ◽  
Von Neumann Architecture

Spiking Neural Networks (SNNs) represent a biologically inspired computation model capable of emulating neural computation in human brain and brain-like structures. The main promise is very low energy consumption. Classic Von Neumann architecture based SNN accelerators in hardware, however, often fall short of addressing demanding computation and data transfer requirements efficiently at scale. In this article, we propose a promising alternative to overcome scalability limitations, based on a network of in-memory SNN accelerators, which can reduce the energy consumption by up to 150.25= when compared to a representative ASIC solution. The significant reduction in energy comes from two key aspects of the hardware design to minimize data communication overheads: (1) each node represents an in-memory SNN accelerator based on a spintronic Computational RAM array, and (2) a novel, De Bruijn graph based architecture establishes the SNN array connectivity.

scholarly journals Neuro-Inspired Signal Processing in Ferromagnetic Nanofibers

Biomimetics ◽  
2021 ◽  
Vol 6 (2) ◽  
pp. 32
Author(s):  
Tomasz Blachowicz ◽  
Jacek Grzybowski ◽  
Pawel Steblinski ◽  
Andrea Ehrmann
Keyword(s):  
Data Processing ◽  
Data Storage ◽  
Domain Walls ◽  
Data Transfer ◽  
Synaptic Activity ◽  
Neuromorphic Computing ◽  
Rotating Magnetic Fields ◽  
Micromagnetic Simulations ◽  
Energy Consuming ◽  
Stochastic Data

Computers nowadays have different components for data storage and data processing, making data transfer between these units a bottleneck for computing speed. Therefore, so-called cognitive (or neuromorphic) computing approaches try combining both these tasks, as is done in the human brain, to make computing faster and less energy-consuming. One possible method to prepare new hardware solutions for neuromorphic computing is given by nanofiber networks as they can be prepared by diverse methods, from lithography to electrospinning. Here, we show results of micromagnetic simulations of three coupled semicircle fibers in which domain walls are excited by rotating magnetic fields (inputs), leading to different output signals that can be used for stochastic data processing, mimicking biological synaptic activity and thus being suitable as artificial synapses in artificial neural networks.

Reliable analog resistive switching behaviors achieved using memristive devices in AlOx/HfOx bilayer structure for neuromorphic systems

2021 ◽  
Author(s):  
Meng Qi ◽  
Tianquan Fu ◽  
Huadong Yang ◽  
ye tao ◽  
Chunran Li ◽  
...  
Keyword(s):  
Resistive Switching ◽  
Learning Experience ◽  
Random Access ◽  
Resistive Random Access Memory ◽  
Spike Timing ◽  
Information Storage ◽  
Bilayer Structure ◽  
Neuromorphic Computing ◽  
Von Neumann ◽  
Simulation Based

Abstract Human brain synaptic memory simulation based on resistive random access memory (RRAM) has an enormous potential to replace traditional Von Neumann digital computer thanks to several advantages, including its simple structure, high-density integration, and the capability to information storage and neuromorphic computing. Herein, the reliable resistive switching (RS) behaviors of RRAM are demonstrated by engineering AlOx/HfOx bilayer structure. This allows for uniform multibit information storage. Further, the analog switching behaviors are capable of imitate several synaptic learning functions, including learning experience behaviors, short-term plasticity-long-term plasticity transition, and spike-timing-dependent-plasticity (STDP). In addition, the memristor based on STDP learning rules are implemented in image pattern recognition. These results may offer a promising potential of HfOx-based memristors for future information storage and neuromorphic computing applications.

Organic Synaptic Transistor with Integration of Memory and Neuromorphic Computing

2021 ◽  
Author(s):  
Shaomin Chen ◽  
Enlong Li ◽  
Rengjian Yu ◽  
Huihuang Yang ◽  
Yujie Yan ◽  
...  
Keyword(s):  
Computing System ◽  
Neuromorphic Computing ◽  
Von Neumann ◽  
Neumann System ◽  
Artificial Synapse

Artificial synapse devices have caused great interest in recent years for attempting to emulate brain-like computing system and to conquer the bottleneck of Von Neumann system. However, integration of the...

Brilliant polymath, troubled person

Physics World ◽  
2021 ◽  
Vol 34 (12) ◽  
pp. 59-60i
Author(s):  
Andrew Robinson
Keyword(s):  
John Von Neumann ◽  
Von Neumann ◽  
The Future

Andrew Robinson reviews The Man from the Future: the Visionary Life of John von Neumann by Ananyo Bhattacharya.

scholarly journals Reconfigurable on-chip communication link for efficient communication

2018 ◽  
Vol 7 (2-1) ◽  
pp. 417
Author(s):  
Beulah Hemalatha S ◽  
Vigneswaran T
Keyword(s):  
Genetic Algorithm ◽  
Power Consumption ◽  
Low Power ◽  
Optimization Problems ◽  
Research Area ◽  
Low Power Consumption ◽  
Communication Link ◽  
Simulated System ◽  
Efficient Communication ◽  
On Chip

Application specific reconfiguration of On-chip communication link is a fast growing research area in system on chip (SoC) based system design. Optimization of the communication link is important to achieve a trade-off between efficient communication and low power consumption. So achieving both efficient communication and low power consumption requires a special optimization mechanism. Such Optimization problems can be solved using a genetic algorithm. Here, in this paper genetic algorithm based On-chip communication link reconfiguration is presented. The algorithm will optimize efficiency of communication link with constrain of low power consumption. The parameters involved in power consumption and efficient communication link are coded in the chromosomes. By evolutionary iteration the optimal parameters of the communication link are derived that is used for the communication link successfully in the simulated system. The performance of the simulated system is analyzed which shows the out performance of the proposed system.

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