A comparison of pipelined parallel and iterative CORDIC design on FPGA

2010 5th International Conference on Industrial and Information Systems ◽

10.1109/iciinfs.2010.5578702 ◽

2010 ◽

Author(s):

Ramesh Bhakthavatchalu ◽

M.S. Sinith ◽

Parvathi Nair ◽

K. Jismi

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