New positional error detection algorithm for a probe-based data storage

2006 ◽  
Author(s):  
Dong-Ki Min ◽  
Seungbum Hong
Keyword(s):  
Data Storage ◽  
Error Detection ◽  
Detection Algorithm ◽  
Positional Error

An Optimized FPGA Implementation of CAN 2.0 Protocol Error Detection Circuitry

2017 ◽  
Vol 6 (3) ◽  
pp. 602
Author(s):  
Md Farukh Hashmi ◽  
Avinash G. Keskar
Keyword(s):  
Embedded System ◽  
Data Storage ◽  
Error Detection ◽  
Low Cost ◽  
Disk Drive ◽  
Critical Issue ◽  
Subsequent Treatment ◽  
Area Network ◽  
Reconfigurable Platform ◽  
Vhdl Code

Controller Area Network is an ideal serial bus design suitable for modern embedded system based networks. It finds its use in most of critical applications, where error detection and subsequent treatment on error is a critical issue. CRC (Cyclic Redundancy Check) block was developed on FPGA in order to meet the needs for simple, low power and low cost wireless communication. This paper gives a short overview of CRC block in the Digital transmitter based on the CAN 2.0 protocols. CRC is the most preferred method of encoding because it provides very efficient protection against commonly occurring burst errors, and is easily implemented. This technique is also sometimes applied to data storage devices, such as a disk drive. In this paper a technique to model the error detection circuitry of CAN 2.0 protocols on reconfigurable platform have been discussed? The software simulation results are presented in the form of timing diagram.FPGA implementation results shows that the circuitry requires very small amount of digital hardware. The Purpose of the research is to diversify the design methods by using VHDL code entry through Modelsim 5.5e simulator and Xilinx ISE8.3i.The VHDL code is used to characterize the CRC block behavior which is then simulated, synthesized and successfully implemented on Sparten3 FPGA .Here, Simulation and Synthesized results are also presented to verify the functionality of the CRC -16 Block. The data rate of CRC block is 250 kbps .Estimated power consumption and maximum operating frequency of the circuitry is also provided.

Focusing Error Detection Method in Microholographic Data Storage System Using Polarization Characteristics

2011 ◽  
Vol 50 (9S1) ◽  
pp. 09ME07
Author(s):  
Taeseob Kim ◽  
Chang-Hyuk Im ◽  
Sang-Hyuck Lee ◽  
Nakyeong Kim ◽  
No-Cheol Park ◽  
...  
Keyword(s):  
Data Storage ◽  
Error Detection ◽  
Detection Method ◽  
Storage System ◽  
Polarization Characteristics ◽  
Data Storage System

scholarly journals Novel Error Detection Algorithm for LZSS Compressed Data

IEEE Access ◽  
2017 ◽  
Vol 5 ◽  
pp. 8940-8947 ◽  
Author(s):  
Beom Kwon ◽  
Myongsik Gong ◽  
Sanghoon Lee
Keyword(s):  
Error Detection ◽  
Detection Algorithm ◽  
Compressed Data

Analysis of Dynamic Method of Line Scales Detection

2009 ◽  
Vol 147-149 ◽  
pp. 576-581
Author(s):  
A. Barakauskas ◽  
Albinas Kasparaitis ◽  
Saulius Kausinis ◽  
R. Lazdinas
Keyword(s):  
Error Detection ◽  
Dynamic Method ◽  
Optical Microscope ◽  
Detection Algorithm ◽  
Uncertainty In Measurement ◽  
Line Scale ◽  
Scale Calibration ◽  
Calibration Program ◽  
Long Stroke ◽  
Scale Detection

The main causes of uncertainty in measurement regarding long-stroke line scales are line detection errors and external factors, especially temperature effects. The number of calibration errors of this sort increases with the extension of calibration time. Therefore, a dynamic method of line scale detection for modern long-stroke line scale comparators is used [1, 2, 3]. The article discusses the dynamic method of line scale detection by means of an optical microscope equipped with a photosensitive cell matrix and a line scale detection algorithm. Advantages of the dynamic method of scale calibration in terms of rate, accuracy and throughput are presented. The method’s error (detection parameters) correlations with detection rate, number of nominal lines, measuring rate, exposition delay are analyzed and mathematical models are described. The optimal values of these parameters are estimated. We are particularly interested in the improvement of the dynamic calibration program algorithm and minimization of uncertainty in measurement. The method was implemented and tested on the long-stroke line scale comparator, which has been developed and realized by JSC Precizika Metrology [3, 4, 5] in cooperation with VGTU and KUT.

Synchronizing focus error detection of dual-pickup heads in a multi-layer data storage system

2008 ◽  
Vol 1 (1-2) ◽  
pp. 183-187
Author(s):  
Zhaolong Shen ◽  
Bing Jiang ◽  
Jianwen Cai ◽  
Min Xu ◽  
Wenhao Huang
Keyword(s):  
Data Storage ◽  
Error Detection ◽  
Storage System ◽  
Data Storage System

An intelligent distortion-detection algorithm for restoring data in a holographic data storage system

2014 ◽  
Vol 20 (8-9) ◽  
pp. 1571-1578 ◽  
Author(s):  
Wooyoung Jeong ◽  
Jang Hyun Kim ◽  
Sung-Yong Lim ◽  
Jae-Seong Lee ◽  
Hyunseok Yang
Keyword(s):  
Data Storage ◽  
Storage System ◽  
Detection Algorithm ◽  
Holographic Data Storage ◽  
Data Storage System

An H.264/AVC Error Detection Algorithm Based on Syntax Analysis

2011 ◽  
pp. 215-234
Author(s):  
Luca Superiori ◽  
Olivia Nemethova ◽  
Markus Rupp
Keyword(s):  
Performance Evaluation ◽  
Error Detection ◽  
Detection Algorithm ◽  
Video Sequences ◽  
Video Streams ◽  
Syntax Analysis ◽  
Standard Methods ◽  
Free Data ◽  
Error Probabilities ◽  
Low Rate

In this chapter, we present the possibility of detecting errors in H.264/AVC encoded video streams. Standard methods usually discard the damaged received packet. Since they can still contain valid information, the localization of the corrupted information elements prevents discarding of the error-free data. The proposed error detection method exploits the set of entropy coded words as well as range and significance of the H.264/AVC information elements. The performance evaluation of the presented technique is performed for various bit error probabilities. The results are compared to the typical packet discard approach. Particular focus is given on low-rate video sequences.

Logic Error Detection Algorithm Based on RNN with Threshold Selection

2020 ◽  
Author(s):  
Taku Matsumoto ◽  
Yutaka Watanobe ◽  
Keita Nakamura ◽  
Yunosuke Teshima
Keyword(s):  
Neural Network ◽  
Recurrent Neural Network ◽  
Error Detection ◽  
Language Model ◽  
Source Code ◽  
Detection Algorithm ◽  
Detection Performance ◽  
Educational Systems ◽  
Determination Method ◽  
Logical Errors

Logical errors in source code can be detected by probabilities obtained from a language model trained by the recurrent neural network (RNN). Using the probabilities and determining thresholds, places that are likely to be logic errors can be enumerated. However, when the threshold is set inappropriately, user may miss true logical errors because of passive extraction or unnecessary elements obtained from excessive extraction. Moreover, the probabilities of output from the language model are different for each task, so the threshold should be selected properly. In this paper, we propose a logic error detection algorithm using an RNN and an automatic threshold determination method. The proposed method selects thresholds using incorrect codes and can enhance the detection performance of the trained language model. For evaluating the proposed method, experiments with data from an online judge system, which is one of the educational systems that provide the automated judge for many programming tasks, are conducted. The experimental results show that the selected thresholds can be used to improve the logic error detection performance of the trained language model.

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