32.3 A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter
2019 ◽
Vol E102.C
(7)
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pp. 520-529
2018 ◽
Vol E101.C
(7)
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pp. 480-487
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Keyword(s):
2013 ◽
Vol E96.C
(6)
◽
pp. 920-922
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2009 ◽
Vol 19
(8)
◽
pp. 518-520
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