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C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory
IEEE Transactions on Circuits and Systems I Regular Papers
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10.1109/tcsi.2021.3139736
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2022
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pp. 1-11
Author(s):
Mor M. Dahan
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Evelyn T. Breyer
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Stefan Slesazeck
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Thomas Mikolajick
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Shahar Kvatinsky
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