Static Performance and Threshold Voltage Stability Improvement of Al₂O₃/LaAlO₃/SiO₂ Gate-Stack for SiC Power MOSFETs

In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.

Download Full-text

Static Performance Assessment of Junctionless Accumulation Mode Gate Stack Gate All Around (JAM-GS-GAA) FinFET Under Severe Temperature

10.1109/icsc53193.2021.9673255 ◽

2021 ◽

Author(s):

Bhavya Kumar ◽

Megha Sharma ◽

Rishu Chaujar

Keyword(s):

Performance Assessment ◽

Gate Stack ◽

Accumulation Mode ◽

Static Performance

Download Full-text

Impact of Hole-Deficiency and Charge Trapping on Threshold Voltage Stability of p-GaN HEMT under Reverse-bias Stress

2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD) ◽

10.1109/ispsd46842.2020.9170043 ◽

2020 ◽

Author(s):

Junting Chen ◽

Mengyuan Hua ◽

Jiali Jiang ◽

Jiabei He ◽

Jin Wei ◽

...

Keyword(s):

Threshold Voltage ◽

Voltage Stability ◽

Reverse Bias ◽

Charge Trapping ◽

Bias Stress ◽

Gan Hemt

Download Full-text

Impact of Device Structure on Neutron-Induced Single-Event Effect in SiC MOSFETs

Materials Science Forum ◽

10.4028/www.scientific.net/msf.963.738 ◽

2019 ◽

Vol 963 ◽

pp. 738-741

Author(s):

Hiroshi Kono ◽

Teruyuki Ohashi ◽

Takao Noda ◽

Kenya Sano

Keyword(s):

Threshold Voltage ◽

Drift Region ◽

Single Event ◽

Drain Voltage ◽

Device Structure ◽

Pin Diodes ◽

Power Mosfets ◽

Single Event Effect ◽

Significant Difference ◽

Avalanche Breakdown Voltage

Neutron single event effect (SEE) tolerance of SiC power MOSFETs with different drift region design were evaluated. The SEE is detected over the SEE threshold voltage (VSEE). The failure rate increases exponentially as the drain voltage increases above VSEE. The device with higher avalanche breakdown voltage has higher SEE threshold voltage. The neutron SEE tolerance of MOSFETs and PiN diodes of the same epitaxial structure were also evaluated. There was no significant difference in the neutron SEE tolerance of these devices.

Download Full-text