RAPID: Memory-Aware NoC for Latency Optimized GPGPU Architectures

IEEE Transactions on Multi-Scale Computing Systems ◽

10.1109/tmscs.2018.2871094 ◽

2018 ◽

Vol 4 (4) ◽

pp. 874-887 ◽

Author(s):

Venkata Yaswanth Raparti ◽

Sudeep Pasricha

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