Physical Synthesis for Advanced Neural Network Processors

Author(s):  
Zhuolun He ◽  
Peiyu Liao ◽  
Siting Liu ◽  
Yuzhe Ma ◽  
Yibo Lin ◽  
...  
Author(s):  
Michelle Yibing Wang ◽  
Bing J. Sheu ◽  
Theodore W. Berger ◽  
Wayne C. Young ◽  
Austin Kwang-Bo Cho

2021 ◽  
Author(s):  
Jian Hu Jian Hu ◽  
Xianlong Zhang ◽  
Xiaohua Shi

Abstract Deep learning has achieved competing results comparing with human beings in many fields. Traditionally, deep learning networks are executed on CPUs and GPUs. In recent years, more and more Neural Network accelerators have been introduced in both academia and industry to improve the performance and energy efficiency for deep learning networks. In this paper, we introduce a flexible and configurable functional NN accelerator simulator, which could be configured to simulate u-architectures for different NN accelerators. The extensible and configurable simulator is helpful for system-level exploration of u-architecture, as well as operator optimization algorithm developments. We also integrated the simulator into the TVM compilation stack as an optional back-end. Users can use TVM to write operators and execute them on the simulator. The simulator is going to be open sourced.


2020 ◽  
Vol 12 (3) ◽  
pp. 28-41
Author(s):  
Vivienne Sze ◽  
Yu-Hsin Chen ◽  
Tien-Ju Yang ◽  
Joel S. Emer

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