scholarly journals Implementation three-step algorithm based on signed digit number system by using neural network

2021 ◽  
Vol 24 (3) ◽  
pp. 1832
Author(s):  
Qabeela Q. Thabit ◽  
Alyaa Ibragim Dawood ◽  
Bayadir A. Issa
Keyword(s):  
Neural Networks ◽  
High Efficiency ◽  
Arithmetic Operation ◽  
Number System ◽  
Arithmetic Circuit ◽  
Digit Number ◽  
High Processing Speed ◽  
Effective System ◽  
Step Algorithm ◽  
High Processing

The need for a simple and effective system that works with high efficiency features such as high processing speed, the ability to solve problems by learning method and accomplish the largest amount of data processing accurately and in little time produces that system, which attracted the efforts of the researcher to employ neural networks in computing away from the complexities that burden traditional computers. We presented a model for the design of the arithmetic circuit for the process of addition the sign digit numbers in a new way to deal with the arithmetic operations, which employment of the use of neural networks, this model includes a theoretical and practical simulation of them. The model relied on the implementation of the addition process based on a three-step algorithm adopted by the signed systems. Which is characterized by the possibility of execution in a parallel way, and therefore it provides the advantage of completion of arithmetic operation regardless of the length of their operands, or in other words, whatever the number of bits in the operands. The simulation of the model is done by entering operands for 6 addition operations (each one has operands are 15-bit length) to be executed simultaneously.

scholarly journals IMPLEMENTATION OF RSA KEY GENERATION BASED ON RNS USING VERILOG

2012 ◽  
pp. 12-16
Author(s):  
VISHAK M ◽  
N. SHANKARAIAH
Keyword(s):  
Embedded System ◽  
Number System ◽  
Residue Number System ◽  
Key Generation ◽  
Verilog Hdl ◽  
Embedded Platform ◽  
High Processing Speed ◽  
Pair Generation ◽  
Level Parallelism ◽  
High Processing

RSA key generation is of great concern for implementation of RSA cryptosystem on embedded system due to its long processing latency. In this paper, a novel architecture is presented to provide high processing speed to RSA key generation for embedded platform with limited processing capacity. In order to exploit more data level parallelism, Residue Number System (RNS) is introduced to accelerate RSA key pair generation, in which these independent elements can be processed simultaneously. A cipher processor based on Transport Triggered Architecture (TTA) is proposed to realize the parallelism at the architecture level. In the meantime, division is avoided in the proposed architecture, which reduces the expense of hardware implementation remarkably. The proposed design is implemented by Verilog HDL and verified in matlab. A rate of 3 pairs per second can be achieved for 1024-bit RSA key generation at the frequency of 100 MHz.

DIGITAL ARITHMETIC USING ANALOG CELLULAR NEURAL NETWORKS

1998 ◽  
Vol 08 (05n06) ◽  
pp. 615-635 ◽  
Author(s):  
SAEID SADEGHI-EMAMCHAIE ◽  
G. A. JULLIEN ◽  
V. S. DIMITROV ◽  
W. C. MILLER
Keyword(s):  
Neural Networks ◽  
Degrees Of Freedom ◽  
Low Voltage ◽  
Arithmetic Operation ◽  
Logic Gates ◽  
Number System ◽  
Cellular Neural Networks ◽  
Base Number ◽  
Digital Arithmetic ◽  
Double Base

We discuss the realization of digital arithmetic using analog arrays in the form of Cellular Neural Networks (CNNs). These networks replace the fast switching nodes of logic gates with slewing nodes using current sources driving into capacitors; this provides both low current spikes and low voltage slewing rates, reducing system noise and cross-talk in low-voltage mixed-signal applications. In this paper we generalize the design methodology using a Symbolic Substitution (SS) technique, and we use a recently developed Double-Base Number System (DBNS) to illustrate our design technique. This choice is predicated on the fact that the DBNS representation is naturally 2-dimensional and excites more degrees of freedom in the design space. Spatial configurations of the recognition/replacement patterns used in SS are defined based on the properties of the DBNS arithmetic operation. The SS recognition phases are implemented by dynamic evaluation of simple conditions defined based on an analysis of the cell dynamic routes. The replacement phases are automatically executed through switching current which force the transition of cell state voltage between logic levels. In effect, we build self-timed logic arrays with all nodes in the system under controlled slew. Simulation results from schematic level designs are provided to demonstrate the effectiveness of the technique.

scholarly journals Fast Automatic Vehicle Detection in UAV Images Using Convolutional Neural Networks

2020 ◽  
Vol 12 (12) ◽  
pp. 1994 ◽  
Author(s):  
Xin Luo ◽  
Xiaoyue Tian ◽  
Huijie Zhang ◽  
Weimin Hou ◽  
Geng Leng ◽  
...  
Keyword(s):  
Neural Networks ◽  
Convolutional Neural Networks ◽  
Vehicle Detection ◽  
Neural Computing ◽  
Detection Capability ◽  
High Processing Speed ◽  
Aerial Vehicle ◽  
Uav Images ◽  
Uav Image ◽  
High Processing

Vehicle targets in unmanned aerial vehicle (UAV) images are generally small, so a significant amount of detailed information on targets may be lost after neural computing, which leads to the poor performances of the existing recognition algorithms. Based on convolutional neural networks that utilize the YOLOv3 algorithm, this article focuses on the development of a quick automatic vehicle detection method for UAV images. First, a vehicle dataset for target recognition is constructed. Then, a novel YOLOv3 vehicle detection framework is proposed according to the following characteristics: The vehicle targets in the UAV image are relatively small and dense. The average precision (AP) increased by 5.48%, from 92.01% to 97.49%, which still remains the rather high processing speed of the YOLO network. Finally, the proposed framework is tested using three datasets: COWC, VEDAI, and CAR. The experimental results demonstrate that our method had a better detection capability.

scholarly journals Adaptive Detection of Direct-Sequence Spread-Spectrum Signals Based on Knowledge-Enhanced Compressive Measurements and Artificial Neural Networks

Sensors ◽  
2021 ◽  
Vol 21 (7) ◽  
pp. 2538
Author(s):  
Shuang Zhang ◽  
Feng Liu ◽  
Yuang Huang ◽  
Xuedong Meng
Keyword(s):  
Neural Networks ◽  
Artificial Neural Networks ◽  
Spread Spectrum ◽  
High Efficiency ◽  
Detection System ◽  
Direct Sequence Spread Spectrum ◽  
Detection Performance ◽  
Detection Methods ◽  
Direct Sequence ◽  
Artificial Neural

The direct-sequence spread-spectrum (DSSS) technique has been widely used in wireless secure communications. In this technique, the baseband signal is spread over a wider bandwidth using pseudo-random sequences to avoid interference or interception. In this paper, the authors propose methods to adaptively detect the DSSS signals based on knowledge-enhanced compressive measurements and artificial neural networks. Compared with the conventional non-compressive detection system, the compressive detection framework can achieve a reasonable balance between detection performance and sampling hardware cost. In contrast to the existing compressive sampling techniques, the proposed methods are shown to enable adaptive measurement kernel design with high efficiency. Through the theoretical analysis and the simulation results, the proposed adaptive compressive detection methods are also demonstrated to provide significantly enhanced detection performance efficiently, compared to their counterpart with the conventional random measurement kernels.

Arithmetic Circuit Classification Using Convolutional Neural Networks

2018 ◽  
Author(s):  
Leandro Maia Silva ◽  
Fabricio Vivas Andrade ◽  
Antonio Otavio Fernandes ◽  
Luiz Filipe Menezes Vieira
Keyword(s):  
Neural Networks ◽  
Convolutional Neural Networks ◽  
Arithmetic Circuit

scholarly journals Multiple-Precision BLAS Library for Graphics Processing Units

2020 ◽  
Author(s):  
Konstantin Isupov ◽  
Vladimir Knyazkov
Keyword(s):  
Graphics Processing Units ◽  
Arithmetic Operation ◽  
Number System ◽  
Residue Number System ◽  
Floating Point ◽  
Data Types ◽  
Rounding Errors ◽  
Multiple Precision ◽  
Graphics Processing ◽  
Point Arithmetic

The binary32 and binary64 floating-point formats provide good performance on current hardware, but also introduce a rounding error in almost every arithmetic operation. Consequently, the accumulation of rounding errors in large computations can cause accuracy issues. One way to prevent these issues is to use multiple-precision floating-point arithmetic. This preprint, submitted to Russian Supercomputing Days 2020, presents a new library of basic linear algebra operations with multiple precision for graphics processing units. The library is written in CUDA C/C++ and uses the residue number system to represent multiple-precision significands of floating-point numbers. The supported data types, memory layout, and main features of the library are considered. Experimental results are presented showing the performance of the library.

scholarly journals Application of the neural network computing technology for calculating the interval-index characteristics of a minimally redundant modular code

2019 ◽  
Vol 62 (6) ◽  
pp. 652-660
Author(s):  
A. F. Chernyavsky ◽  
A. A. Kolyada ◽  
S. Yu. Protasenya
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
High Speed ◽  
Theoretical Estimate ◽  
Structural Complexity ◽  
Fold Increase ◽  
Number System ◽  
Parallel Structure ◽  
Network Computing ◽  
Time Expenditures

The article is devoted to the problem of creation of high-speed neural networks (NN) for calculation of interval-index characteristics of a minimally redundant modular code. The functional base of the proposed solution is an advanced class of neural networks of a final ring. These neural networks perform position-modular code transformations of scalable numbers using a modified reduction technology. A developed neural network has a uniform parallel structure, easy to implement and requires the time expenditures of the order (3[log2b]+ [log2k]+6tsum  close to the lower theoretical estimate. Here b and k is the average bit capacity and the number of modules respectively; t sum is the duration of the two-place operation of adding integers. The refusal from a normalization of the numbers of the modular code leads to a reduction of the required set of NN of the finite ring on the (k – 1) component. At the same time, the abnormal configuration of minimally redundant modular coding requires an average k-fold increase in the interval index module (relative to the rest of the bases of the modular number system). It leads to an adequate increase in hardware expenses on this module. Besides, the transition from normalized to unregulated coding reduces the level of homogeneity of the structure of the NN for calculating intervalindex characteristics. The possibility of reducing the structural complexity of the proposed NN by using abnormal intervalindex characteristics is investigated.

scholarly journals Analysis and classification of tem¬perature measurements during melting and casting of alloys using neural networks

2020 ◽  
Vol 63 (10) ◽  
pp. 856-861
Author(s):  
A. V. Fedosov ◽  
G. V. Chumachenko
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Human Factor ◽  
High Efficiency ◽  
Thermal Conditions ◽  
Second Stage ◽  
Three Stages ◽  
Fully Automatic ◽  
Artificial Neural

The article considers the issues of monitoring the thermal conditions of alloys melting and casting at foundries. It is noted that the least reliable method is when the measurement and fixing the temperature is assigned to the worker. On the other hand, a fully automatic approach is not always available for small foundries. In this regard, the expediency of using an automated approach is shown, in which the measurement is assigned to the worker, and the values are recorded automatically. This method assumes implementation of an algorithm for automatic classification of temperature measurements based on an end-to-end array of data obtained in the production stream. The solving of this task is divided into three stages. Preparing of raw data for classification process is provided on the first stage. On the second stage, the task of measurement classification is solved by using neural network principles. Analysis of the results of the artificial neural network has shown its high efficiency and degree of their correspondence with the actual situation on the work site. It was also noted that the application of artificial neural networks principles makes the classification process flexible, due to the ability to easily supplement the process with new parameters and neurons. The final stage is analysis of the obtained results. Correctly performed data classification provides an opportunity not only to assess compliance with technological discipline at the site, but also to improve the process of identifying the causes of casting defects. Application of the proposed approach allows us to reduce the influence of human factor in the analysis of thermal conditions of alloys melting and casting with minimal costs for melting monitoring.

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