scholarly journals Realization of combinational logic circuits using standard functions in quantum dot cellular automata

2021 ◽  
Vol 12 (5) ◽  
pp. 583-597
Author(s):  
Ratna Chakrabarty ◽  
Niranjan Kumar Mandal
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Logic Circuits ◽  
Combinational Logic ◽  
Quantum Dot Cellular Automata ◽  
Combinational Logic Circuits

Dual-Edge Triggered T Flip-Flop Structure Using Quantum-Dot Cellular Automata

2013 ◽  
Vol 662 ◽  
pp. 562-567 ◽  
Author(s):  
Lin Rong Xiao ◽  
Xiang Xu ◽  
Shi Yan Ying
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Circuit Design ◽  
High Performance ◽  
Clock Frequency ◽  
Single Edge ◽  
Sequential Circuit ◽  
Flip Flop ◽  
Quantum Dot Cellular Automata ◽  
Combinational Logic Circuits

As an emerging nanotechnology, quantum-dot cellular automata (QCA) has the potential to be used for next generation VLSI. Various designs of combinational logic circuits have been proposed for QCA implementation, but sequential circuit design is limited due to the lack of high-performance QCA flip-flops. After an introduction on QCA and dual-edge triggered (DET) flip-flops, a new QCA DET T flip-flop following a pulsed latch scheme is presented. The proposed T flip-flop is simulated using QCADesigner simulator and its logic functionality is verified. The same data throughput of the DET flip-flop can be achieved while operating at half the clock frequency of a single-edge triggered (SET) counterpart. The proposed flip-flop is promising in building QCA sequential circuits with low power and high performance.

scholarly journals Design of Improved 8:1 Multiplexer using Quantum-dot Cellular Automata Technology

2020 ◽  
Vol 9 (1) ◽  
pp. 2659-2662
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Cell Count ◽  
Power Dissipation ◽  
Quantum Physics ◽  
Logic Circuits ◽  
Digital Logic ◽  
Quantum Dot Cellular Automata

A much-required breakthrough in the field of VLSI took place with the birth of Quantum-dot cellular automata (QCA) technology, an impressive amalgamation of Quantum Physics and Nanotechnology and acted as a possible replacement to the age-old semiconductor transistor-based designs (CMOS) with Boolean paradigm. In this paper, we aim at implementing this technology to build a robust 8:1 multiplexer that can help in building and developing many more digital logic circuits, from an already proposed 2:1 multiplexer. It has excellent efficiency with respect to least cell count, latency, space and power dissipation.

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