scholarly journals NEW ASYMMETRIC 21-LEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES

2019 ◽  
Vol 16 (1) ◽  
pp. 18 ◽  
Author(s):  
Thiyagarajan V ◽  
Somasundaran P

Multilevel inverter plays an important role in the field of modern power electronics and is widely being used for many high voltage and high power industrial and commercial applications. The objective of this paper is to design and simulate the modified asymmetric multilevel inverter topology with reduced number of switches. The proposed inverter topology synthesizes 21-level output voltage during symmetric operation using three DC voltage sources and twelve switches 8 main switches and 4 auxiliary switches. The different methods of calculating the switching angles are presented in this paper. The MATLAB/Simulink software is used to simulate the proposed inverter. The performance of the proposed inverter is analyzed and the corresponding simulation results are presented in this paper.

2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).


2019 ◽  
Vol 29 (01) ◽  
pp. 2050004
Author(s):  
Sidharth Sabyasachi ◽  
Vijay B. Borghate ◽  
Santosh Kumar Maddugari

This paper presents a module for single-phase multilevel inverter topology. The proposed module generates maximum 21-level bipolar output voltage with asymmetric sources without H-bridge. This results in reduction in filter cost and size. The module can be cascaded for high voltage applications. The same arrangement of voltage source magnitudes in first module is maintained in the remaining cascaded modules. The proposed topology is suitable for the applications like electric vehicle and emergency services like residences and hospitality industries, etc. A set of comparisons between the proposed and recently published topologies are provided to differentiate between them. The topology is simulated and verified in MATLAB/SIMULINK. A hardware prototype is developed in the laboratory for experimental confirmation with various conditions.


10.29007/m2mq ◽  
2018 ◽  
Author(s):  
Shubham R. Patel ◽  
Gaurang K. Sharma ◽  
Ashish R. Patel

Multilevel inverter allows the production of high voltage with lower harmonic distortion in ac output and it eliminates the need of transformer. With the usage of multilevel inverter, we can get the required ac voltage output from multiple dc voltage rails. One of the disadvantage in it is the unbalancing of dc link capacitor voltage. The basic aim of this paper is the balancing of dc link capacitor voltage in diode-clamped multilevel inverter. There are different approaches which could be used for balancing of the capacitor voltage. In this paper, the method of additional auxiliary circuit in the form of Two-level Boost converter is being adopted to balance the inner capacitor voltages so as to get the required multilevel output. This balancing leads to the reliability in the inverter output voltage and extension in life of capacitor. The simulations for this are being performed in MATLAB SIMULINK® and the result are being analyzed for the same by employing it for different load condition. The scheme thus offer the proper balancing of capacitor voltage.


Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi

The multi level inverter system is habitually exploited in AC drives, when both reduced harmonic contents and high power are required. In this paper, a new topology for three phase asymmetrical multilevel inverter employing reduced number of switches is introduced. With less number of switches, the cost, space and weight of the circuit are automatically reduced. This paper discusses the new topology, the switching strategies and the operational principles of the chosen inverter. Simulation is carried out using MATLAB-SIMULINK. Various conventional PWM techniques that are appropriate to the chosen circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM are employed in this work. COPWM technique affords the less THD value and also affords a higher fundamental RMS output voltage.


2017 ◽  
Vol 2017 ◽  
pp. 1-16 ◽  
Author(s):  
Aparna Prayag ◽  
Sanjay Bodkhe

In this paper a basic block of novel topology of multilevel inverter is proposed. The proposed approach significantly requires reduced number of dc voltage sources and power switches to attain maximum number of output voltage levels. By connecting basic blocks in series a cascaded multilevel topology is developed. Each block itself is also a multilevel inverter. Analysis of proposed topology is carried out in symmetric as well as asymmetric operating modes. The topology is investigated through computer simulation using MATLAB/Simulink and validated experimentally on prototype in the laboratory.


2019 ◽  
Vol 29 (08) ◽  
pp. 2050117
Author(s):  
Madan Kumar Das ◽  
Akanksha Sinha ◽  
Kartick Chandra Jana

A novel asymmetrical nine-level inverter topology using only six switches along with its generalized structure are presented in this paper. The proposed reduced switch multilevel inverter topology makes use of a lower total standing voltage for a required output voltage as compared to the existing ones. One of the major advantages of the proposed multilevel inverter over other existing topologies is that, the circuit can be extended to a higher-level inverter, by cascading a few proposed inverter modules and can also be extended to the three-phase structure very easily, thereby making the inverter structure simple. In addition to this, the proposed inverter module does not require any additional H-bridge circuit to obtain the negative voltage levels for AC voltage, resulting in reduced voltage stress on the switches. This paper also incorporates an effective technique to determine the total standing voltage as well as the switching and conduction losses of the inverter. The MATLAB/Simulink based proposed nine-level as well as an 81-level inverters are modeled and the simulation results are presented. An experimental prototype of nine-level inverter using six switches is developed and tested to validate the simulation results.


2013 ◽  
Vol 313-314 ◽  
pp. 876-881
Author(s):  
M.R. Rashmi ◽  
B. Anu

Nonconventional energy sources are playing important role in meeting current power/energy demands. However these sources cannot provide High voltage/power. For power conditioning and voltage amplification solid state power converters are very much essential. One such approach to obtain high voltage was to use cascaded multilevel inverter but cascaded multilevel inverters require separate DC sources and they cannot be used for regenerative applications. To overcome these limitations, a novel configuration is using diode clamped multilevel inverter is proposed here. . The conditioned DC voltage from photovoltaic cells or fuel cells or batteries is boosted and inverted by means of multistage Multilevel Inverters (MLI). Three different configurations are presented in this paper. From the simulation results of all three configurations, the topology which is found to be better is implemented in the real time. A proto type is developed to boost 40 V input DC to 100 V AC and the experimental results for the same are presented.


2016 ◽  
Vol 24 (8) ◽  
pp. 1440-1454 ◽  
Author(s):  
R Geetha ◽  
M Ramaswamy

The paper develops a new topology for a three phase multilevel inverter with a view to reduce the number of switches in the path of the current. It encompasses a mechanism to reach the desired target voltage and in turn enable the three phase induction motor to operate at the specified speed. The formulation incorporates the theory of an appropriate pulse width modulation strategy to ensure the elimination of higher frequency components of the output voltage. The use of relatively smaller number of carriers in the process of generating the switching pulses serves to enhance the output voltage spectrum. The intriguing merits of the phase disposition over the other modulation schemes enable to arrive at a nearly sinusoidal voltage. The performance obtained from the prototype substantiate the MATLAB based simulation results and establish the ability of the series parallel switched multilevel inverter topology to offer an improved performance for the induction motor.


Author(s):  
Polu Veera Pratap ◽  
S. Sridhar

Multilevel inverters have been widely used for high-voltage and high-power applications. Their perf0rmance is greatly superi0r t0 that 0f c0nventi0nal tw0-level inverters due t0 their reduced t0tal harm0nic dist0rti0n (THD),. This t0p0l0gy requires fewer c0mp0nents when c0mpared t0 di0de clamped, flying capacit0r and Bridgeless cascaded inverters and it requires fewer carrier signals and gate drives. Theref0re, the 0verall c0st and circuit c0mplexity are greatly reduced. This paper presents a n0vel reference and multicarrier based PWM scheme It als0 c0mpares the perf0rmance 0f the pr0p0sed scheme with that 0f c0nventi0nal cascaded bridge less rectifier (CBR) multilevel inverters. finally Simulati0n results fr0m MATLAB/SIMULINK are presented t0 verify the perf0rmance 0f the Five-level Multilevel Inverter


2019 ◽  
Vol 28 (04) ◽  
pp. 1950064 ◽  
Author(s):  
S. A. Ahamed Ibrahim ◽  
P. Anbalagan ◽  
M. A. Jagabar Sathik

In this paper, a new asymmetric switched diode (ASD) multilevel inverter is presented for medium-voltage and high-power applications. The proposed converter consists of series connection basic unit with full-bridge inverter. In addition to this, a cascaded switched diode (CSD) structure is recommended to generate the higher number of voltage levels. Seven different algorithms are presented to determine the magnitudes of DC sources in CSD topology. To prove the advantages of proposed multilevel converter over recent multilevel converters in terms of blocking voltage, numbers of IGBTs and on-state switches are presented. To show the authority of the proposed multilevel inverter, it is simulated using MATLAB/Simulink and is experimentally tested using prototype model for 13-level inverter. Finally, various output voltage and current waveforms are shown to prove the dynamic behavior of proposed inverter.


Sign in / Sign up

Export Citation Format

Share Document