scholarly journals TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms

2021 ◽  
Vol 3 ◽  
Author(s):  
Shima Hosseinzadeh ◽  
Mehrdad Biglari ◽  
Dietmar Fey
Keyword(s):  
Energy Requirement ◽  
Random Access ◽  
Energy Performance ◽  
Spin Transfer Torque ◽  
Verification Method ◽  
Hybrid Solutions ◽  
Data Representations ◽  
Non Volatile Memory ◽  
Ternary Data ◽  
Energy Latency

Non-volatile memory (NVM) technologies offer a number of advantages over conventional memory technologies such as SRAM and DRAM. These include a smaller area requirement, a lower energy requirement for reading and partly for writing, too, and, of course, the non-volatility and especially the qualitative advantage of multi-bit capability. It is expected that memristors based on resistive random access memories (ReRAMs), phase-change memories, or spin-transfer torque random access memories will replace conventional memory technologies in certain areas or complement them in hybrid solutions. To support the design of systems that use NVMs, there is still research to be done on the modeling side of NVMs. In this paper, we focus on multi-bit ternary memories in particular. Ternary NVMs allow the implementation of extremely memory-efficient ternary weights in neural networks, which have sufficiently high accuracy in interference, or they are part of carry-free fast ternary adders. Furthermore, we lay a focus on the technology side of memristive ReRAMs. In this paper, a novel memory model in the circuit level is presented to support the design of systems that profit from ternary data representations. This model considers two read methods of ternary ReRAMs, namely, serial read and parallel read. They are extensively studied and compared in this work, as well as the write-verification method that is often used in NVMs to reduce the device stress and to increase the endurance. In addition, a comprehensive tool for the ternary model was developed, which is capable of performing energy, performance, and area estimation for a given setup. In this work, three case studies were conducted, namely, area cost per trit, excessive parameter selection for the write-verification method, and the assessment of pulse width variation and their energy latency trade-off for the write-verification method in ReRAM.

scholarly journals A Fundamental Study on the Development of New Energy Performance Index in Office Buildings

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2064
Author(s):  
Jin-Hee Kim ◽  
Seong-Koo Son ◽  
Gyeong-Seok Choi ◽  
Young-Tag Kim ◽  
Sung-Bum Kim ◽  
...  
Keyword(s):  
Energy Consumption ◽  
Energy Requirement ◽  
Energy Performance ◽  
Office Buildings ◽  
Light Transmittance ◽  
Wall Structure ◽  
Fundamental Study ◽  
Future Studies ◽  
U Value ◽  
The Impact

Recently, there have been significant concerns regarding excessive energy use in office buildings with a large window-to-wall ratio (WWR) because of the curtain wall structure. However, prior research has confirmed that the impact of the window area on energy consumption varies depending on building size. A newly proposed window-to-floor ratio (WFR) correlates better with energy consumption in the building. In this paper, we derived the correlation by analyzing a simulation using EnergyPlus, and the results are as follows. In the case of small buildings, the results of this study showed that the WWR and energy requirement increase proportionally, and the smaller the size is, the higher the energy sensitivity will be. However, results also confirmed that this correlation was not established for buildings approximately 3600 m2 or larger. Nevertheless, from analyzing the correlation between the WFR and the energy requirements, it could be deduced that energy required increased proportionally when the WFR was 0.1 or higher. On the other hand, the correlation between WWR, U-value, solar heat gain coefficient (SHGC), and material property values of windows had little effect on energy when the WWR was 20%, and the highest effect was seen at a WWR of 100%. Further, with an SHGC below 0.3, the energy requirement decreased with an increasing WWR, regardless of U-value. In addition, we confirmed the need for in-depth research on the impact of the windows’ U-value, SHGC, and WWR, and this will be verified through future studies. In future studies on window performance, U-value, SHGC, visible light transmittance (VLT), wall U-value as sensitivity variables, and correlation between WFR and building size will be examined.

scholarly journals Machine Learning for Statistical Modeling

2021 ◽  
Vol 26 (3) ◽  
pp. 1-17
Author(s):  
Urmimala Roy ◽  
Tanmoy Pramanik ◽  
Subhendu Roy ◽  
Avhishek Chatterjee ◽  
Leonard F. Register ◽  
...  
Keyword(s):  
Machine Learning ◽  
Time Distribution ◽  
Switching Time ◽  
A Priori ◽  
Random Access ◽  
Spin Transfer Torque ◽  
Support Vector ◽  
Micromagnetic Simulations ◽  
Physical Systems ◽  
Computational Resources

We propose a methodology to perform process variation-aware device and circuit design using fully physics-based simulations within limited computational resources, without developing a compact model. Machine learning (ML), specifically a support vector regression (SVR) model, has been used. The SVR model has been trained using a dataset of devices simulated a priori, and the accuracy of prediction by the trained SVR model has been demonstrated. To produce a switching time distribution from the trained ML model, we only had to generate the dataset to train and validate the model, which needed ∼500 hours of computation. On the other hand, if 10 6 samples were to be simulated using the same computation resources to generate a switching time distribution from micromagnetic simulations, it would have taken ∼250 days. Spin-transfer-torque random access memory (STTRAM) has been used to demonstrate the method. However, different physical systems may be considered, different ML models can be used for different physical systems and/or different device parameter sets, and similar ends could be achieved by training the ML model using measured device data.

scholarly journals Implications of NVM Based Storage on Memory Subsystem Management

2020 ◽  
Vol 10 (3) ◽  
pp. 999
Author(s):  
Hyokyung Bahn ◽  
Kyungwoon Cho
Keyword(s):  
Random Access ◽  
Disk Drive ◽  
Main Memory ◽  
Memory Storage ◽  
Storage Device ◽  
Storage Devices ◽  
Large Memory ◽  
Memory Subsystems ◽  
Non Volatile Memory ◽  
Management Techniques

Recently, non-volatile memory (NVM) has advanced as a fast storage medium, and legacy memory subsystems optimized for DRAM (dynamic random access memory) and HDD (hard disk drive) hierarchies need to be revisited. In this article, we explore the memory subsystems that use NVM as an underlying storage device and discuss the challenges and implications of such systems. As storage performance becomes close to DRAM performance, existing memory configurations and I/O (input/output) mechanisms should be reassessed. This article explores the performance of systems with NVM based storage emulated by the RAMDisk under various configurations. Through our measurement study, we make the following findings. (1) We can decrease the main memory size without performance penalties when NVM storage is adopted instead of HDD. (2) For buffer caching to be effective, judicious management techniques like admission control are necessary. (3) Prefetching is not effective in NVM storage. (4) The effect of synchronous I/O and direct I/O in NVM storage is less significant than that in HDD storage. (5) Performance degradation due to the contention of multi-threads is less severe in NVM based storage than in HDD. Based on these observations, we discuss a new PC configuration consisting of small memory and fast storage in comparison with a traditional PC consisting of large memory and slow storage. We show that this new memory-storage configuration can be an alternative solution for ever-growing memory demands and the limited density of DRAM memory. We anticipate that our results will provide directions in system software development in the presence of ever-faster storage devices.

Progress and Prospects of Spin Transfer Torque Random Access Memory

2012 ◽  
Vol 48 (11) ◽  
pp. 3025-3030 ◽  
Author(s):  
E. Chen ◽  
D. Apalkov ◽  
A. Driskill-Smith ◽  
A. Khvalkovskiy ◽  
D. Lottis ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Spin Transfer Torque ◽  
Spin Transfer ◽  
Access Memory

scholarly journals Ultrathin perpendicular magnetic anisotropy CoFeB free layers for highly efficient, high speed writing in spin-transfer-torque magnetic random access memory

2019 ◽  
Vol 9 (1) ◽  
Author(s):  
Jodi M. Iwata-Harms ◽  
Guenole Jan ◽  
Santiago Serrano-Guisan ◽  
Luc Thomas ◽  
Huanlong Liu ◽  
...  
Keyword(s):  
Magnetic Anisotropy ◽  
High Speed ◽  
Random Access ◽  
Perpendicular Magnetic Anisotropy ◽  
Spin Transfer Torque ◽  
Tunnel Barrier ◽  
Magnetic Memory ◽  
Material System ◽  
Highly Efficient ◽  
Memory Applications

AbstractPerpendicular magnetic anisotropy (PMA) ferromagnetic CoFeB with dual MgO interfaces is an attractive material system for realizing magnetic memory applications that require highly efficient, high speed current-induced magnetic switching. Using this structure, a sub-nanometer CoFeB layer has the potential to simultaneously exhibit efficient, high speed switching in accordance with the conservation of spin angular momentum, and high thermal stability owing to the enhanced interfacial PMA that arises from the two CoFeB-MgO interfaces. However, the difficulty in attaining PMA in ultrathin CoFeB layers has imposed the use of thicker CoFeB layers which are incompatible with high speed requirements. In this work, we succeeded in depositing a functional CoFeB layer as thin as five monolayers between two MgO interfaces using magnetron sputtering. Remarkably, the insertion of Mg within the CoFeB gave rise to an ultrathin CoFeB layer with large anisotropy, high saturation magnetization, and good annealing stability to temperatures upwards of 400 °C. When combined with a low resistance-area product MgO tunnel barrier, ultrathin CoFeB magnetic tunnel junctions (MTJs) demonstrate switching voltages below 500 mV at speeds as fast as 1 ns in 30 nm devices, thus opening a new realm of high speed and highly efficient nonvolatile memory applications.

scholarly journals Overview of radiation effects on emerging non-volatile memory technologies

2017 ◽  
Vol 32 (4) ◽  
pp. 381-392
Author(s):  
Irfan Fetahovic ◽  
Edin Dolicanin ◽  
Djordje Lazarevic ◽  
Boris Loncar
Keyword(s):  
Radiation Effects ◽  
Random Access ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
Access Memory ◽  
High Radiation ◽  
Different Types ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
Change Memory

In this paper we give an overview of radiation effects in emergent, non-volatile memory technologies. Investigations into radiation hardness of resistive random access memory, ferroelectric random access memory, magneto-resistive random access memory, and phase change memory are presented in cases where these memory devices were subjected to different types of radiation. The obtained results proved high radiation tolerance of studied devices making them good candidates for application in radiation-intensive environments.

Reliability Analysis and Performance Evaluation of STT-MRAM-Based Physical Unclonable Function

SPIN ◽  
2020 ◽  
Vol 10 (02) ◽  
pp. 2040002
Author(s):  
You Wang ◽  
Hanchen Wang ◽  
Weisheng Zhao ◽  
Hao Cai
Keyword(s):  
Circuit Design ◽  
Power Efficiency ◽  
Hamming Distance ◽  
Rapid Development ◽  
Random Access ◽  
Thermal Conditions ◽  
Random Oracle ◽  
Spin Transfer Torque ◽  
Security Level ◽  
Physical Unclonable Function

Physical unclonable function (PUF) is considered as a promising primitive for variety of security applications since its appearance, such as authentication, key generators and random oracle. With the fast development of Internet of Things (IoT), the requirement for low complexity, high power efficiency and enhanced security level of PUF becomes urgent. Meanwhile, the conventional PUF instances based on optical effect and semiconductors fail to meet the requirements due to poor scalability and sensitivity to attacks. This paper proposes a circuit design of PUF by utilizing the spin transfer torque magnetic random access memory (STT-MRAM). The performance of presented circuit design is thoroughly investigated from the aspects of uniqueness, reliability, uniformity, diffuseness, access speed and energy consumption. The simulation results show that the inter-Hamming distance can achieve 50% and the intra-Hamming distance can be reduced as low as 0%, resulting in perfect security. Meanwhile, the circuit behaves high immunity to environmental variations such as high and low temperature. With the rapid development of artificial intelligence, many powerful attack methods emerge. To defend against these attacks, the user reconfigurable function has been proposed. Moreover, design space including programming voltage, device parameters and thermal conditions has been explored to optimize the reliability of this function.

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