scholarly journals Optimized Modulation Method for Common-Mode Voltage Reduction in H7 Inverter

Energies ◽  
2021 ◽  
Vol 14 (19) ◽  
pp. 6409
Author(s):  
Belete Belayneh Negesse ◽  
Chang-Hwan Park ◽  
Seung-Hwan Lee ◽  
Seon-Woong Hwang ◽  
Jang-Mok Kim

The three-phase H7 inverter topology installs an additional power semiconductor switch to the positive or negative node of the DC-link for reducing the common-mode voltage (CMV) by disconnecting the inverter from the DC source during the zero-voltage vectors. The conventional CMV reduction method for the three-phase H7 inverter uses modified discontinuous pulse width modulation (MDPWM) and generates a switching signal for the additional switch using logical operations. However, the conventional method is unable to eliminate the CMV for the entire dwell time of the zero-voltage vectors. It only has the effect of reducing the CMV in a limited area of the space vector where the V7 zero voltage vector is applied. Therefore, this paper proposes an optimized modulation method that can reduce the CMV during the entire dwell time of zero-voltage vectors. The proposed method moves the switching patterns by adding an offset voltage to guarantee that only one kind of zero-voltage vector, V7, is applied in the system. It then turns off the seventh switch only during the zero-voltage vector to disconnect the inverter from the DC source. As a result, the CMV and the leakage current are attenuated for the entire dwell time of the zero-voltage vector. Simulation and experimental results confirm the validity of the proposed method.

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.


2019 ◽  
Vol 9 (7) ◽  
pp. 1342
Author(s):  
Nguyen Dinh Tuyen ◽  
Le Minh Phuong

The multilevel indirect matrix converter (IMC) is a merit of power converter for feeding a three-phase load from three-phase power supply because it has several attractive features such as: Sinusoidal input/output currents, bidirectional power flow, long lifetime due to the absence of bulky electrolytic capacitors. As compared to the conventional IMC, the multilevel IMC provides high output performance by increasing the level of output voltage. In this paper, the novel approach topology of multilevel IMC by using the combination of the cascaded rectifier and the three-level T-Type inverter is introduced. Furthermore, the new space vector pulse width modulation (SVPWM) method for the presented multilevel IMC that eliminate the common-mode voltage is proposed in this paper. The simulation study is carried out in PSIM software to verify the proposed modulation method. Then, an experimental system is built using a three-phase RL load, a multilevel IMC, a DSP controller board and other elements to verify the effectiveness of the proposed modulation method. Some simulation and experimental results are illustrated to confirm the theory analysis.


Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 779 ◽  
Author(s):  
Ming Wu ◽  
Zhenhao Song ◽  
Zhipeng Lv ◽  
Kai Zhou ◽  
Qi Cui

To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.


Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 586 ◽  
Author(s):  
Jaehyuk Baik ◽  
Sangwon Yun ◽  
Dongsik Kim ◽  
Chunki Kwon ◽  
Jiyoon Yoo

A minimum root mean square (RMS) torque ripple-remote-state pulse-width modulation (MTR-RSPWM) technique is proposed for minimizing the RMS torque ripple under reduced common-mode voltage (CMV) condition of three-phase voltage source inverters (VSI)-fed brushless alternating current (BLAC) motor drives. The q-axis current ripple due to an error voltage vector generated between the reference voltage vector and applied voltage vector is analyzed for all pulse patterns with reduced CMV of the RSPWM. From the analysis result, in the MTR-RSPWM, a sector is divided into five zones, and within each zone, pulse patterns with the lowest RMS torque ripple and reduced CMV are employed. To verify the validity of the MTR-RSPWM, theorical analysis, simulation, and experiments are performed, where the MTR-RSPWM is thoroughly compared with RSPWM3 that generates the minimum RMS current ripple. From the analytical, simulation, and experimental results, it is shown that the MTR-RSPWM significantly reduces the RMS torque ripple under a reduced CMV condition at the expense of an increase in the RMS current ripple, compared to the RSPWM3.


2021 ◽  
Vol 13 (1) ◽  
pp. 5
Author(s):  
Shang Jiang ◽  
Yuan Wang

Common-mode voltage can be reduced effectively by optimized modulation methods without increasing additional costs. However, the existing methods cannot satisfy the requirements of the vehicular electric-drive application. This paper optimizes the tri-state voltage modulation method to reduce the common-mode voltage for vehicular electric drive system applications. Firstly, the discontinuous switching issue during sector transition is analyzed. Under the limit of two switching times in one period, multiple alignments combination is proposed to address that issue. Secondly, the zero-voltage time intervals in different modulation ranges are explored. This paper proposes an unsymmetric translation method to reconstruct the voltage vector, and then the minimum zero-voltage time interval is controlled to enough value for safe switching. Finally, the proposed methods have been validated through experiments on a vehicular electric drive system. The results show that the common-mode voltage can be reduced effectively in the whole range with the optimized tri-state voltage modulation method.


Author(s):  
Hoan Quoc Tran ◽  
Tien Manh Vu ◽  
Tuyen Dinh Nguyen

This paper presents a space vector modulation strategy for a three-phase indirect matrix converter to reduce the common-mode voltage and maintain the output performance. To reduce the peak value of the common-mode voltage to 57.7% of the input phase voltage, three active voltage vectors are used to generate the desired output voltage with arbitrary amplitude and frequency, instead of using both active and zero voltage vectors as in the traditional space vector modulation strategy. Although the common-mode voltage is reduced, the output waveform quality of the three-phase indirect matrix converter deteriorates due to the absence of the zero voltage vectors. To overcome this problem, the proposed space vector modulation strategy is redesigned to control the rectifier stage of the indirect matrix converter by utilizing three active current vectors instead of two as usual. Consequently, the constant average dc-link voltage is achieved, which can improve the output performance in terms of the output voltage and current harmonic distortion. The simulation is implemented by PSIM software and experimental results are provided to verify the effectiveness of the proposed space vector modulation strategy.


Energies ◽  
2019 ◽  
Vol 12 (9) ◽  
pp. 1662 ◽  
Author(s):  
Janina Rząsa ◽  
Elżbieta Sztajmec

The matrix converter (MC) is the n-phase input and m-phase output power electronic system. To synthesis the controllable sinusoidal output voltage and input current with controllable input displacement angle, the pulse width modulation method (PWM) is used in the MC. During the modulation process a problem of the common mode voltage (CMV) exists. The elimination of the CMV in three-to-six-phase MC by usage of only rotating voltage space vectors is analyzed in the paper. The carrier based implementation of the space vector modulation (SVM) with Venturini modulation functions is applied to the control of the three-to-six-phase MC. Entire elimination of the CMV in three-to-six-phase MC is presented in the paper. The simulation and experiment results confirm utility of the proposed modulation method.


Energies ◽  
2020 ◽  
Vol 13 (15) ◽  
pp. 3884
Author(s):  
Jian Zheng ◽  
Mingcheng Lyu ◽  
Shengqing Li ◽  
Qiwu Luo ◽  
Keyuan Huang

Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.


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