scholarly journals CMOS Implementation of ANNs Based on Analog Optimization of N-Dimensional Objective Functions

Sensors ◽  
2021 ◽  
Vol 21 (21) ◽  
pp. 7071
Author(s):  
Alejandro Medina-Santiago ◽  
Carlos Arturo Hernández-Gracidas ◽  
Luis Alberto Morales-Rosales ◽  
Ignacio Algredo-Badillo ◽  
Monica Amador García ◽  
...  

The design of neural network architectures is carried out using methods that optimize a particular objective function, in which a point that minimizes the function is sought. In reported works, they only focused on software simulations or commercial complementary metal-oxide-semiconductor (CMOS), neither of which guarantees the quality of the solution. In this work, we designed a hardware architecture using individual neurons as building blocks based on the optimization of n-dimensional objective functions, such as obtaining the bias and synaptic weight parameters of an artificial neural network (ANN) model using the gradient descent method. The ANN-based architecture has a 5-3-1 configuration and is implemented on a 1.2 μm technology integrated circuit, with a total power consumption of 46.08 mW, using nine neurons and 36 CMOS operational amplifiers (op-amps). We show the results obtained from the application of integrated circuits for ANNs simulated in PSpice applied to the classification of digital data, demonstrating that the optimization method successfully obtains the synaptic weights and bias values generated by the learning algorithm (Steepest-Descent), for the design of the neural architecture.

2010 ◽  
Vol 20 (04) ◽  
pp. 341-353 ◽  
Author(s):  
HAYSSAM SERHAN ◽  
CHAIBAN G. NASR ◽  
PATRICK HENAFF

This paper shows how to use a DC motor and its PID controller, to behave analogously to a muscle. A model of the muscle that has been learned by a NNARX (Neural Network Auto Regressive eXogenous) structure is used. The PID parameters are tuned by an MLP Network with a special indirect online learning algorithm. The calculation of the learning algorithm is performed based on a mathematical equation of the DC motor or with a Neural Network identification of the motor. For each of the two algorithms, the output of the muscle model is used as a reference for the DC motor control loop. The results show that we succeeded in forcing the physical system to behave in the same way as the muscle model with acceptable margin of error. An implementation in the knees of a simulated biped robot is realized. Simulation compares articular trajectories with and without the muscle emulator and shows that with muscle emulator, articular trajectories become closer to the human being ones and that total power consumption is reduced.


Sensors ◽  
2020 ◽  
Vol 20 (11) ◽  
pp. 3101
Author(s):  
Jaihyuk Choi ◽  
Sungjae Lee ◽  
Youngdoo Son ◽  
Soo Youn Kim

This paper presents an always-on Complementary Metal Oxide Semiconductor (CMOS) image sensor (CIS) using an analog convolutional neural network for image classification in mobile applications. To reduce the power consumption as well as the overall processing time, we propose analog convolution circuits for computing convolution, max-pooling, and correlated double sampling operations without operational transconductance amplifiers. In addition, we used the voltage-mode MAX circuit for max pooling in the analog domain. After the analog convolution processing, the image data were reduced by 99.58% and were converted to digital with a 4-bit single-slope analog-to-digital converter. After the conversion, images were classified by the fully connected processor, which is traditionally performed in the digital domain. The measurement results show that we achieved an 89.33% image classification accuracy. The prototype CIS was fabricated in a 0.11 μm 1-poly 4-metal CIS process with a standard 4T-active pixel sensor. The image resolution was 160 × 120, and the total power consumption of the proposed CIS was 1.12 mW with a 3.3 V supply voltage and a maximum frame rate of 120.


Author(s):  
Rasheed Adekunle Adebayo ◽  
Mehluli Moyo ◽  
Evariste Bosco Gueguim-Kana ◽  
Ignatius Verla Nsahlai

Artificial Neural Network (ANN) and Random Forest models for predicting rumen fill of cattle and sheep were developed. Data on rumen fill were collected from studies that reported body weights, measured rumen fill and stated diets fed to animals. Animal and feed factors that affected rumen fill were identified from each study and used to create a dataset. These factors were used as input variables for predicting the weight of rumen fill. For ANN modelling, a three-layer Levenberg-Marquardt Back Propagation Neural Network was adopted and achieved 96% accuracy in prediction of the weight of rumen fill. The precision of the ANN model’s prediction of rumen fill was higher for cattle (80%) than sheep (56%). On validation, the ANN model achieved 95% accuracy in prediction of the weight of rumen fill. A Random Forest model was trained using a binary tree-based machine-learning algorithm and achieved 87% accuracy in prediction of rumen fill. The Random Forest model achieved 16% (cattle) and 57% (sheep) accuracy in validation of the prediction of rumen fill. In conclusion, the ANN model gave better predictions of rumen fill compared to the Random Forest model and should be used in predicting rumen fill of cattle and sheep.


Sensors ◽  
2020 ◽  
Vol 20 (13) ◽  
pp. 3649
Author(s):  
Minhyun Jin ◽  
Hyeonseob Noh ◽  
Minkyu Song ◽  
Soo Youn Kim

In this paper, we propose a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that has built-in mask circuits to selectively capture either edge-detection images or normal 8-bit images for low-power computer vision applications. To detect the edges of images in the CIS, neighboring column data are compared in in-column memories after column-parallel analog-to-digital conversion with the proposed mask. The proposed built-in mask circuits are implemented in the CIS without a complex image signal processer to obtain edge images with high speed and low power consumption. According to the measurement results, edge images were successfully obtained with a maximum frame rate of 60 fps. A prototype sensor with 1920 × 1440 resolution was fabricated with a 90-nm 1-poly 5-metal CIS process. The area of the 4-shared 4T-active pixel sensor was 1.4 × 1.4 µm2, and the chip size was 5.15 × 5.15 mm2. The total power consumption was 9.4 mW at 60 fps with supply voltages of 3.3 V (analog), 2.8 V (pixel), and 1.2 V (digital).


2016 ◽  
Vol 9 (2) ◽  
pp. 222-238 ◽  
Author(s):  
Amos Olaolu Adewusi ◽  
Tunbosun Biodun Oyedokun ◽  
Mustapha Oyewole Bello

Purpose This study assesses the classification accuracy of an artificial neural network (ANN) model. It examines the application of loan recovery probability rather than odds of default as the case with traditional credit evaluation models. Design/methodology/approach Data on 2,300 loans granted over the period 2001-2012 was obtained from the databases of Nigerian commercial banks and primary mortgage institutions. A multilayer feed-forward ANN model with back-propagation learning algorithm was developed having classified the sample into training (38 per cent), testing (41 per cent) and validation (21 per cent) sub-samples. Findings The model exhibits a high overall percentage classification accuracy of 92.6 per cent. It also achieves relatively low misclassification Type I and Type II errors at 6.5 per cent and 8.2 per cent, respectively. Macroeconomic variables such as gross domestic product, inflation and interest rates have the strongest influence on the ANN model classification power. The result of the analysis shows that adopting odds of recovery in ANN classification models can lead to improved loan evaluation. Originality/value The paper is distinct from extant studies in that it presents a new dimension to loan evaluation in Nigerian lending market. To the best knowledge of the authors, the paper is among the first to explore probability of loan recovery as the basis for credit evaluation in the country.


2010 ◽  
Vol 146-147 ◽  
pp. 720-723
Author(s):  
Yong Cheng Lin ◽  
Xiao Min Chen ◽  
Yu Chi Xia

The compressive deformation experiments of 2124-T851 aluminum alloy were carried out over a wide range of temperature and strain rate. An artificial neural network (ANN) model is developed for the analysis and simulation of the correlation between the flow behaviors of hot compressed 2124-T851 aluminum alloy and working conditions. The input parameters of the model consist of strain rate, forming temperature and deformation degree whereas flow stress is the output. A three layer feed-forward network with 15 neurons in a single hidden layer and back propagation (BP) learning algorithm has been employed. Good performance of the ANN model is achieved. The predicted results are consistent with what is expected from fundamental theory of hot compression deformation, which indicates that the excellent capability of the developed ANN model to predict the flow stress level, the strain hardening and flow softening stages is well evidenced.


Circuit World ◽  
2020 ◽  
Vol 46 (2) ◽  
pp. 93-105
Author(s):  
Neethu Anna Sabu ◽  
Batri K.

Purpose This paper aims to design three low-power and area-efficient serial input parallel output (SIPO) register designs, namely, transistor count reduction technique shift register (TCRSR), series stacking in TCR shift register (S-TCRSR) and forced stacking of transistor in TCR shift register (FST in TCRSR). Shift registers (SR) are the basic building blocks of all types of digital applications. The performance of all the designs has been improved through one of the metaheuristic algorithms named elephant herding optimization (EHO) algorithm and hence suited for low-power very large scale integration (VLSI) applications. It is for the first time that the EHO algorithm is implemented in memory elements. Design/methodology/approach The registers together with clock network consume 18-36 percentage of the total power consumption of a microprocessor. The proposed designs are implemented using low-power and high-performance double edge-triggered D flip-flops with least count of clocked transistors involving transmission gate. The second and third register designs are developed from the modified version of the first one employing series and forced stacking, thereby reducing static power because of sub-threshold leakage current. The performance parameters such as power-delay-product (PDP) and leakage power are further optimized using the EHO algorithm. A greater reduction in power is achieved in all the designs by utilizing the EHO algorithm. Findings All the designs are simulated at a supply voltage of 1 V/500 MHz when the input switching activity is 25 percentage in Cadence Virtuoso using 45 nm CMOS technology. Nine recently proposed SR designs are simulated in the same conditions, and the performance has been compared with the proposed ones. The simulated results prove the excellence of proposed designs in different performance parameters like leakage power, energy-delay-product (EDP), PDP, layout area compared with the recent designs. The PDPdq value has a reduction of 95.9per cent (TCRSR), 96.6per cent (S-TCRSR) and 97per cent (FST in TCRSR) with that of a conventional shift register (TGSR). Originality/value The performance of proposed low-power SR designs is enhanced using EHO algorithm. The optimized performance results have been compared with a few optimization algorithms. It is for the first time that EHO algorithm is implemented in memory elements.


Author(s):  
Chungkuk Jin ◽  
HanSung Kim ◽  
JeongYong Park ◽  
MooHyun Kim ◽  
Kiseon Kim

Abstract This paper presents a method for detecting damage to a gillnet based on sensor fusion and the Artificial Neural Network (ANN) model. Time-domain numerical simulations of a slender gillnet were performed under various wave conditions and failure and non-failure scenarios to collect big data used in the ANN model. In training, based on the results of global performance analyses, sea states, accelerations of the net assembly, and displacements of the location buoy were selected as the input variables. The backpropagation learning algorithm was employed in training to maximize damage-detection performance. The output of the ANN model was the identification of the particular location of the damaged net. In testing, big data, which were not used in training, were utilized. Well-trained ANN models detected damage to the net even at sea states that were not included in training with high accuracy.


Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 590
Author(s):  
Nishat Tarannum Tasneem ◽  
Ifana Mahbub

This paper presents a power-efficient complementary metal-oxide-semiconductor (CMOS) neural signal-recording read-out circuit for multichannel neuromodulation implants. The system includes a neural amplifier and a successive approximation register analog-to-digital converter (SAR-ADC) for recording and digitizing neural signal data to transmit to a remote receiver. The synthetic neural signal is generated using a LabVIEW myDAQ device and processed through a LabVIEW GUI. The read-out circuit is designed and fabricated in the standard 0.5 μμm CMOS process. The proposed amplifier uses a fully differential two-stage topology with a reconfigurable capacitive-resistive feedback network. The amplifier achieves 49.26 dB and 60.53 dB gain within the frequency bandwidth of 0.57–301 Hz and 0.27–12.9 kHz to record the local field potentials (LFPs) and the action potentials (APs), respectively. The amplifier maintains a noise–power tradeoff by reducing the noise efficiency factor (NEF) to 2.53. The capacitors are manually laid out using the common-centroid placement technique, which increases the linearity of the ADC. The SAR-ADC achieves a signal-to-noise ratio (SNR) of 45.8 dB, with a resolution of 8 bits. The ADC exhibits an effective number of bits of 7.32 at a low sampling rate of 10 ksamples/s. The total power consumption of the chip is 26.02 μμW, which makes it highly suitable for a multi-channel neural signal recording system.


Author(s):  
Nan Pan ◽  
Xin Shen ◽  
Xiaojue Guo ◽  
Min Cao ◽  
Dilin Pan

In recent years, electricity stealing has been repeatedly prohibited, and as the methods of stealing electricity have become more intelligent and concealed, it is growing increasingly difficult to extract high-dimensional data features of power consumption. In order to solve this problem, a correlation model of power-consumption data based on convolutional neural networks (CNN) is established. First, the original user signal is preprocessed to remove the noise. The user signal with a fixed signal length is then intercepted and the parallel class labelled. The segmented user signals and corresponding labels are input into the convolutional neural network for training, and the trained convolutional neural network is then used to detect and classify the test user signals. Finally, the actual steal leak dataset is used to verify the effectiveness of this algorithm, which proves that the algorithm can effectively carry out anti–-electricity stealing by warning of abnormal power consumption behavior. There are lots of line traces on the surface of the broken ends which left in the cable cutting case crime scene along the high-speed railway in China. The line traces usually present nonlinear morphological features and has strong randomness. It is not very effective when using existing image-processing and three-dimensional scanning methods to do the trace comparison, therefore, a fast algorithm based on wavelet domain feature aiming at the nonlinear line traces is put forward to make fast trace analysis and infer the criminal tools. The proposed algorithm first applies wavelet decomposition to the 1-D signals which picked up by single point laser displacement sensor to partially reduce noises. After that, the dynamic time warping is employed to do trace feature similarity matching. Finally, using linear regression machine learning algorithm based on gradient descent method to do constant iteration. The experiment results of cutting line traces sample data comparison demonstrate the accuracy and reliability of the proposed algorithm.


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