scholarly journals The Impact of a Paraelectric layer in the FE/DE Stack on Performance of NCFET

2022 ◽  
Author(s):  
Harshit Kansal ◽  
Aditya S Medury
Keyword(s):  
Low Power ◽  
Layer Thickness ◽  
Remnant Polarization ◽  
Design Space ◽  
Performance Parameters ◽  
Analog Performance ◽  
Wide Range ◽  
The Impact ◽  
Tcad Simulations ◽  
Mfis Structure

<div>In this letter, through TCAD simulations, we show that the introduction of a thin paraelectric (PE) layer between the ferroelectric (FE) and dielectric (DE) layers in an MFIS structure, expands the design space for the FE layer enabling hysteresis-free and steep subthreshold behavior, even with a thicker FE layer. This can be explained by analyzing the FE-PE stack from a capacitance perspective where the thickness of the PE layer in the FE-PE stack has the effect of reducing the FE layer thickness, while also reducing the remnant polarization. Finally, for the same FE-PE-DE stack, analog performance parameters such as $\frac{g_{m}} g_{ds}}$ and $\frac{g_{m}}{I_{d}}$ are analyzed, showing good characteristics over a wide range of gate lengths, at low drain voltages, thus demonstrating applicability for low power applications.</div>

scholarly journals The Impact of a Paraelectric layer in the FE/DE Stack on Performance of NCFET

2022 ◽  
Author(s):  
Harshit Kansal ◽  
Aditya S Medury
Keyword(s):  
Low Power ◽  
Layer Thickness ◽  
Remnant Polarization ◽  
Design Space ◽  
Performance Parameters ◽  
Analog Performance ◽  
Wide Range ◽  
The Impact ◽  
Tcad Simulations ◽  
Mfis Structure

<div>In this letter, through TCAD simulations, we show that the introduction of a thin paraelectric (PE) layer between the ferroelectric (FE) and dielectric (DE) layers in an MFIS structure, expands the design space for the FE layer enabling hysteresis-free and steep subthreshold behavior, even with a thicker FE layer. This can be explained by analyzing the FE-PE stack from a capacitance perspective where the thickness of the PE layer in the FE-PE stack has the effect of reducing the FE layer thickness, while also reducing the remnant polarization. Finally, for the same FE-PE-DE stack, analog performance parameters such as $\frac{g_{m}} g_{ds}}$ and $\frac{g_{m}}{I_{d}}$ are analyzed, showing good characteristics over a wide range of gate lengths, at low drain voltages, thus demonstrating applicability for low power applications.</div>

A general consideration of incident impact energy accumulation in molecular dynamics thin film simulations—a new approach using thermal control layer marching algorithms

2005 ◽  
Vol 461 (2064) ◽  
pp. 3977-3998 ◽  
Author(s):  
Hong-Chang Lin ◽  
Jee-Gong Chang ◽  
Shin-Pon Ju ◽  
Chi-Chuan Hwang
Keyword(s):  
Thin Film ◽  
Layer Thickness ◽  
Reaction Layer ◽  
Incident Energy ◽  
Thermal Control ◽  
Computational Effort ◽  
Energy Accumulation ◽  
Wide Range ◽  
The Impact ◽  
Control Layer

This paper investigates several highly accurate algorithms which can be used to calculate the morphology in a wide range of thin film process simulations, and which require minimum computational effort. Three different algorithms are considered, namely the kinetic energy corrector (KEC) algorithm, the thermal control layer marching (TLM) algorithm, and the thermal control layer marching algorithm with an incorporated KEC function (TLMC). A common characteristic of these algorithms is that they all address the recovery of the impact incident energy within the free reaction layer. However, they differ in their treatment of the thermal control layer. The TLM and TLMC algorithms consider this layer to be moveable, whereas the KEC algorithm regards it as being fixed. The advantage of employing a moveable thermal control layer is that the computational effort required to carry out simulation is reduced since the atoms lying below this layer are excluded. The relative accuracy and efficiency of the proposed algorithms are evaluated by considering their use in the simulation of the trench-filling problem associated with the damascene process. The results of the present investigation indicate that the TLM algorithm has the ability to provide an accurate morphology calculation for low and medium energy incident atoms. However, for higher incident energy impacts, the TLMC algorithm is found to be a more appropriate choice because the incorporated energy corrector function is required to remove the higher energy accumulation which occurs within the deposited atoms. Furthermore, for all three algorithms, it is noted that a suitable specification of the free reaction layer thickness is essential in determining the accuracy and efficiency of the simulation. Finally, this paper discusses the relationship between the energy absorption rate and the thickness of the free reaction layer, and presents the optimal free reaction layer thickness for different incident energy intensities.

Thermal Stability of Thin Virtual Substrates for High Performance Devices

2006 ◽  
Vol 913 ◽  
Author(s):  
Sarah H Olsen ◽  
Steve J Bull ◽  
Peter Dobrosz ◽  
Enrique Escobedo-Cousin ◽  
Rimoon Agaiby ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Raman Spectroscopy ◽  
Layer Thickness ◽  
Critical Thickness ◽  
Great Promise ◽  
Initial Growth ◽  
Strained Si ◽  
Strained Layers ◽  
Wide Range ◽  
The Impact

AbstractDetailed investigations of strain generation and relaxation in Si films grown on thin Si0.78Ge0.22 virtual substrates using Raman spectroscopy are presented. Good virtual substrate relaxation (>90%) is achieved by incorporating C during the initial growth stage. The robustness of the strained layers to relaxation is studied following high temperature rapid thermal annealing typical of CMOS processing (800-1050 °C). The impact of strained layer thickness on thermal stability is also investigated. Strain in layers below the critical thickness did not relax following any thermal treatments. However for layers above the critical thickness the annealing temperature at which the onset of strain relaxation occurred appeared to decrease with increasing layer thickness. Strain in Si layers grown on thin and thick virtual substrates having identical Ge composition and epilayer thickness has been compared. Relaxation through the introduction of defects has been assessed through preferential defect etching in order to verify the trends observed. Raman signals have been analysed by calibrated deconvolution and curve-fitting of the spectra peaks. Raman spectroscopy has also been used to study epitaxial layer thickness and the impact of Ge out-diffusion during processing. Improved device performance and reduced self-heating effects are demonstrated in thin virtual substrate devices when fabricated using strained layers below the critical thickness. The results suggest that thin virtual substrates offer great promise for enhancing the performance of a wide range of strained Si devices.

Enabling Right-Provisioned Microprocessor Architectures for the Internet of Things

2015 ◽  
Author(s):  
Tosiron Adegbija ◽  
Anita Rogacs ◽  
Chandrakant Patel ◽  
Ann Gordon-Ross
Keyword(s):  
Internet Of Things ◽  
Low Power ◽  
Data Transmission ◽  
Edge Computing ◽  
The Internet ◽  
Clock Frequency ◽  
Power Devices ◽  
Wide Range ◽  
The Impact ◽  
The Internet Of Things

The Internet of Things (IoT) consists of embedded low-power devices that collect and transmit data to centralized head nodes that process and analyze the data, and drive actions. The proliferation of these connected low-power devices will result in a data explosion that will significantly increase data transmission costs with respect to energy consumed and latency. Edge computing performs computations at the edge nodes prior to data transmission to interpret and/or utilize the data, thus reducing transmission costs. In this work, we seek to understand the interactions between IoT applications’ execution characteristics (e.g., compute/memory intensity, cache miss rates, etc.) and the edge nodes’ microarchitectural characteristics (e.g., clock frequency, memory capacity, etc.) for efficient and effective edge computing. Thus, we present a broad and tractable IoT application classification methodology and using this classification, we analyze the microarchitectural characteristics of a wide range of state-of-the-art embedded system microprocessors and evaluate the microprocessors’ applicability to IoT computation using various evaluation metrics. We also investigate and quantify the impact of leakage power reduction on the overall energy consumption across different architectures. Our work provides insights into the microarchitectural characteristics’ impact on system performance and efficiency for various IoT application requirements. Our work also provides a foundation for the analysis and design of a diverse set of microprocessor architectures for IoT edge computing.

scholarly journals Assessment of Interface Trap Charges on Proposed TFET for Low Power High-frequency Application

2021 ◽  
Author(s):  
Sachin Kumar ◽  
Dharmendra Singh Yadav
Keyword(s):  
Low Power ◽  
High Frequency ◽  
Superior Performance ◽  
Interface Trap ◽  
Performance Parameters ◽  
Metal Gate ◽  
Ultra Low Power ◽  
Dual Metal ◽  
The Impact ◽  
Trap Charges

Abstract Accumulation of trap charges at the semiconductor and oxide interface is the most dominating factor and cannot be neglected as it degrades device performance and reliability. This manuscript, presents detailed investigation to analyze the impact of interface trap charges (ITCs) on the performance parameters of the proposed device i.e., heterogeneous dielectric dual metal gate step channel TFET (HD DMG SC-TFET). The comparative study is conducted with dual metal gate step channel TEFT (DMG SC-TFET). The proposed device shows improved current carrying capability, suppressed ambipolar behaviour with steeper subthreshold swing. The purpose of this study to determine the ITCs impact on DC characteristics and analog/RF electrical performance parameters of the proposed device. It further observed that the proposed device exhibit superior performance due to dielectric engineering at oxide layer. Moreover, advanced communication devices must respond linearly therefore, the impact of ITCs on linearity parameters is also studied. From this brief comparative investigation, it is observed that the proposed TFET exhibits negligible distortion in linearity parameters with little or no impact of trap charges as compared to DMG SC-TFET. Thus, proposed TFET is appropriate for ultra-low power high-frequency electronic devices.

THE IMPACT OF LEADERSHIP PRACTICES TO TEAM MEMBERS’ SATISFACTION

2009 ◽  
Vol 8 (1) ◽  
Author(s):  
Chalimah .
Keyword(s):  
Conflict Resolution ◽  
Leadership Practices ◽  
Hotel Industry ◽  
Leader Behavior ◽  
Team Leader ◽  
Shop Floor ◽  
Team Members ◽  
Top Executives ◽  
Wide Range ◽  
The Impact

eamwork is becoming increasingly important to wide range of operations. It applies to all levels of the company. It is just as important for top executives as it is to middle management, supervisors and shop floor workers. Poor teamwork at any level or between levels can seriously damage organizational effectiveness. The focus of this paper was therefore to examine whether leadership practices consist of team leader behavior, conflict resolution style and openness in communication significantly influenced the team member’s satisfaction in hotel industry. Result indicates that team leader behavior and the conflict resolution style significantly influenced team member satisfaction. It was surprising that openness in communication did not affect significantly to the team members’ satisfaction.

The impact of design space constraints on the noise and emissions from derivative engines for civil supersonic aircraft

2021 ◽  
Author(s):  
Laurens Voet ◽  
Prakash Prashanth ◽  
Raymond Speth ◽  
Jayant Sabnis ◽  
Choon Tan ◽  
...  
Keyword(s):  
Design Space ◽  
Supersonic Aircraft ◽  
The Impact

PERFORMANCE PARAMETERS OF LOW POWER SRAM CELLS: A REVIEW

2018 ◽  
Vol 6 (1) ◽  
pp. 25
Author(s):  
TIWARI NIDHI ◽  
NEEMA VAIBHAV ◽  
J RANGRA KAMAL ◽  
CHANDRA SHARMA YOGESH ◽  
◽  
...  
Keyword(s):  
Low Power ◽  
Performance Parameters

Stress, anxiety, depression and burnout in frontline health care workers during COVID-19 pandemic: a brief systematic review and new data from Russia

2021 ◽  
Author(s):  
Ekaterina Mosolova ◽  
Dmitry Sosin ◽  
Sergey Mosolov
Keyword(s):  
Risk Factors ◽  
Systematic Review ◽  
Female Gender ◽  
Assessment Tools ◽  
Care Workers ◽  
Younger Age ◽  
Wide Range ◽  
Associated Risk Factors ◽  
Anxiety Depression ◽  
The Impact

During the COVID-19 pandemic, healthcare workers (HCWs) have been subject to increased workload while also exposed to many psychosocial stressors. In a systematic review we analyze the impact that the pandemic has had on HCWs mental state and associated risk factors. Most studies reported high levels of depression and anxiety among HCWs worldwide, however, due to a wide range of assessment tools, cut-off scores, and number of frontline participants in the studies, results were difficult to compare. Our study is based on two online surveys of 2195 HCWs from different regions of Russia during spring and autumn epidemic outbreaks revealed the rates of anxiety, stress, depression, emotional exhaustion and depersonalization and perceived stress as 32.3%, 31.1%, 45.5%, 74.2%, 37.7% ,67.8%, respectively. Moreover, 2.4% of HCWs reported suicidal thoughts. The most common risk factors include: female gender, nurse as an occupation, younger age, working for over 6 months, chronic diseases, smoking, high working demands, lack of personal protective equipment, low salary, lack of social support, isolation from families, the fear of relatives getting infected. These results demonstrate the need for urgent supportive programs for HCWs fighting COVID-19 that fall into higher risk factors groups.

A MODELING SYSTEM FOR CLIMATE CHANGE RISK ASSESSMENT, MANAGEMENT AND HEDGING IN COASTAL AREAS

2017 ◽  
Author(s):  
Sergei Soldatenko ◽  
Sergei Soldatenko ◽  
Genrikh Alekseev ◽  
Genrikh Alekseev ◽  
Alexander Danilov ◽  
...  
Keyword(s):  
Climate Change ◽  
Risk Assessment ◽  
Coastal Areas ◽  
Mitigation Strategies ◽  
System Structure ◽  
The Arctic ◽  
Risk Modeling ◽  
Wide Range ◽  
Adverse Weather ◽  
The Impact

Every aspect of human operations faces a wide range of risks, some of which can cause serious consequences. By the start of 21st century, mankind has recognized a new class of risks posed by climate change. It is obvious, that the global climate is changing, and will continue to change, in ways that affect the planning and day to day operations of businesses, government agencies and other organizations and institutions. The manifestations of climate change include but not limited to rising sea levels, increasing temperature, flooding, melting polar sea ice, adverse weather events (e.g. heatwaves, drought, and storms) and a rise in related problems (e.g. health and environmental). Assessing and managing climate risks represent one of the most challenging issues of today and for the future. The purpose of the risk modeling system discussed in this paper is to provide a framework and methodology to quantify risks caused by climate change, to facilitate estimates of the impact of climate change on various spheres of human activities and to compare eventual adaptation and risk mitigation strategies. The system integrates both physical climate system and economic models together with knowledge-based subsystem, which can help support proactive risk management. System structure and its main components are considered. Special attention is paid to climate risk assessment, management and hedging in the Arctic coastal areas.

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