Design and Test of a Rapid Thermal Annealing Furnace for Improving Surface Properties of Silicon Brick in Multi-Wire Sawing Process

2014 ◽  
Vol 939 ◽  
pp. 437-442
Author(s):  
Chao Chang Arthur Chen ◽  
Shou Chih Cheng ◽  
Ming Hsien Chan ◽  
Wen Ching Hsu ◽  
Shih Lung Cheng

Multi-wire sawing process with free abrasive slurry or called multi-wire slurry wire sawing (MW-SWS) process has been popularly adopted in slicing of silicon substrates for solar cell application. However, the chipping or edge cracking of thin thickness as 200 μm of such silicon substrates need to be improved in current mass production. The potential subsurface cracks induced by previous edge grinding or brush polishing of silicon brick may be the main cause. This paper is to develop a rapid thermal annealing (RTA) process for thermal annealing of the surface quality of silicon brick before MR-SWS. In this study, a RTA furnace is designed and used to improve the material property of surface of silicon brick. A quartz crucible is used as heating source with the maximum heated specimen size of 156×156×100 mm (W×H×L). The bulk silicon brick used in this study is selected with a size of 20×10×20 mm (W×H×L) and supplied by the Sino-American Silicon Ltd. (SAS) in Hsinchu, Taiwan. The nitrogen gas is also injected as a protective gas for target heating temperature around 550°C with rapid heating rate of 50°C per second. The micro-Vickers (Akashi MVK-H1) and SEM (JSM-6500F, JOEL) instruments have been used to observe the improvement of rectified material properties of bulk silicon substrate. Experiments of silicon wafers have been first performed for obtaining the recipe of RTA testing and then adjusting for silicon brick testing. Results have been verified by the lower surface hardness and larger crystal grain size after RTA treatment. Furthermore, such treated silicon brick can be further adopted for MW-SWS process to identify the effects of reducing chipping or edge cracking of silicon substrates for solar cell application.


2020 ◽  
Vol 59 (10) ◽  
pp. 105503
Author(s):  
Wafaa Magdy ◽  
Ayaka Kanai ◽  
F. A. Mahmoud ◽  
E. T. El Shenawy ◽  
S. A. Khairy ◽  
...  


1985 ◽  
Vol 52 ◽  
Author(s):  
D. L. Kwong ◽  
N. S. Alvi ◽  
Y. H. Ku ◽  
A. W. Cheung

ABSTRACTDouble-diffused shallow junctions have been formed by ion implantation of both phosphorus and arsenic ions into silicon substrates and rapid thermal annealing. Experimental results on defect removal, impurity activation and redistribution, effects of Si preamorphization, and electrical characteristics of Ti-silicided junctions are presented.



AIP Advances ◽  
2012 ◽  
Vol 2 (3) ◽  
pp. 032150 ◽  
Author(s):  
Min-Hao Hong ◽  
Chun-Wei Chang ◽  
Dung-Ching Perng ◽  
Kuan-Ching Lee ◽  
Shiu-Ko Jang Jian ◽  
...  


Author(s):  
E. Susi ◽  
R. Fabbri ◽  
A. Poggi ◽  
L. Passari ◽  
M. C. Carotta ◽  
...  


1989 ◽  
Vol 146 ◽  
Author(s):  
Leonard Rubin ◽  
Nicole Herbots ◽  
JoAnne Gutierrez ◽  
David Hoffman ◽  
Di Ma

ABSTRACTA method for producing shallow silicided diodes for MOS devices (with junction depths of about 0.1 µm), by implanting after forming the silicide layer was investigated. The key to this integrated process is the use of rapid thermal annealing (RTA) to activate the dopants in the silicon, so that there is very little thermal broadening of the implant distribution. Self-aligned titanium silicide (TiSi2) films with thicknesses ranging from 40 to 80 nm were grown by RTA of sputter deposited titanium films on silicon substrates. After forming the TiSi2, arsenic and boron were implanted. A second RTA step was used after implantation to activate these dopants. It was found that implanting either dopant caused a sharp increase in the sheet resistivity of the TiSi2. The resistivity can be easily restored to its original value (about 18 µΩ-cm) by a post implant RTA anneal. RBS analysis showed that arsenic diffuses rapidly in the TiSi2 during RTA at temperatures as low as 600°C. SIMS data indicated that boron was not mobile up to temperatures of 900°C, possibly because it forms a compound with the titanium which precipitates in the TiSi 2. Coalescence of TiSi2 occurs during post implant furnace annealing, leading to an increase in the sheet resistivity. The amount of coalescence depends on the film thickness, but not on whether or not the film had been subject to implantation. Spreading resistance profiling data showed that both arsenic and boron diffused into the TiSi2 during furnace annealing, reducing the surface concentrations of dopant at the TiSi2/Si interface. Both N+/P and P+/N diodes formed by this technique exhibited low leakage currents after the second RTA anneal. This is attributed to removal of the implant damage by the RTA. In summary, the second RTA serves the dual purpose of removing implant damage in the TiSi2 and creating the shallow junction by dopant activation.



2019 ◽  
Vol 57 ◽  
pp. 7-16
Author(s):  
Tung Thanh Bui ◽  
Tien Minh Huynh ◽  
Thuy Thanh Tieu ◽  
Chien Mau Dang

Metallic nanoparticles have various potential applications. Recent studies have showed that their morphology had a strong influence on their optical and electrical properties. In this work, rapid thermal annealing was used to produce gold nanoparticles on silicon substrates. Morphology control of the gold nanoparticles was made by changing inert annealing gases. Spherical gold nanoparticles were obtained with nitrogen while hemispherical gold nanoparticles were formed with argon.



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