Enhanced and Efficient Carry Select Adder with Minimal Delay

In today’s digital world, Arithmetic computations have been evolved as a core factor in digital signal processors, micro-controllers, and systems using arithmetic and logical operations such as adders, multipliers, image processors, and signal processors. One of the elements that play an important role in performing arithmetic calculations is an adder. Among many adders, the Carry Select Adder produces less propagation delay. However, there may be an increased delay, power consumption, and area required in the case of a normal Carry Select Adder. To overcome the mentioned drawbacks, an improved model of Carry Select Adder has been designed that uses Binary to Excess – 1 Converter. Instead of using multiple blocks of Ripple Carry Adders (RCAs), it is efficient and effective if one of the blocks is replaced with Binary to Excess – 1 Converter. As a result, we can achieve a high speed adder with minimal delay, minimal power, and reduced area.

Issues in translating English and Arabic plurals

This study explores undergraduate students’ difficulties in translating English and Arabic plurals. The results of an English and Arabic plural translation test exhibited cases where Arabic plurals matching those in English were translated correctly. However, the students had difficulty translating the following: (i) Arabic plurals with a singular English equivalent, e.g., مجوهرات /mujawharaat/ jewellery; (ii) Arabic duals with two different singular stems, e.g., الرافدان the Tigris and Euphrates; (iii) multiple Arabic plurals, i.e. plurals of paucity and multiplicity, e.g., دجاج /dajaaj/ chicken, دجاجات /dajaajaat/ a number of hens; (iv) stems with two plurals and different usages, e.g., economics اقتصاديات /iqtiṣadiyyaat/, economies اقتصادات /iqtiṣadaat/; (v) compound plurals, e.g., image processors معالجات الصور /muʕaalijaat aṣṣuwar/; (vi) English nouns ending in -ies that have the same singular and plural form, e.g., series, species; (vii) singular and plural forms of the same base when the base could assume two parts of speech, e.g., rich and riches; wood and woods; (viii) foreign/Latin singular and plural forms, e.g. ,indices, larvae, tempi, oases; and (ix) names of tools and articles of dress consisting of two parts ending in -s, e.g., scissors مقص /miqaṣ/, مقصات /miqaṣaat/, scales ميزان /mīzaan/ and موازين /mawazīn/ and more. Error data analysis showed that the subjects made more errors in translating Arabic plurals into English than in translating English plurals into Arabic, made more interlanguage than interlanguage errors, had more morphological than semantic difficulties on the Arabic-English plural translation test, and had more semantic difficulties on the English-Arabic plural translation test. They tended to translate imitatively rather than discriminately, and literal translation was the most common strategy. When they could not access the meaning of a noun on the test, they provided an equivalent that was phonologically close, or offered a paraphrase, an explanation, or an extraneous equivalent. In translating English and Arabic plurals, transfers were bidirectional, i.e., students transferred a noun’s morphological features from the source to the target language, regardless of whether the source language was Arabic (L1) or English (L2). Recommendations for plural translation instruction are provided.

Novel Stochastic Computing for Energy-Efficient Image Processors

Stochastic computing, which is based on probability, involves a trade-off between accuracy and power and is a promising solution for energy-efficiency in error-tolerance designs. In this paper, adder and multiplier circuits based on the proposed stochastic computing architecture are studied and analyzed. First, we propose an efficient yet simple stochastic computation technique for multipliers and adders by exchanging the wires used for their operation. The results demonstrate that the proposed design reduces the relative error in computation compared with the conventional designs and has smaller area compared to conventional designs. Then, a new energy-efficient and high-performance stochastic adder with acceptable error metrics is investigated. The proposed multiplier shows better error metrics than other existing stochastic multipliers, and significantly improves area utilization and power consumption compared to the exact binary multiplier. Finally, we apply the proposed stochastic architecture to an edge detection algorithm and achieve a significant reduction in area utilization (64%) and power consumption (96%). It is therefore demonstrated that the proposed stochastic architecture is suitable for energy-efficient hardware designs.

Fredkin and Toffoli Gates Implemented in Oregonator Model of Belousov–Zhabotinsky Medium

A thin-layer Belousov–Zhabotinsky (BZ) medium is a powerful computing device capable for implementing logical circuits, memory, image processors, robot controllers, and neuromorphic architectures. We design the reversible logical gates — Fredkin gate and Toffoli gate — in a BZ medium network of excitable channels with subexcitable junctions. Local control of the BZ medium excitability is an important feature of the gates’ design. An excitable thin-layer BZ medium responds to a localized perturbation with omnidirectional target or spiral excitation waves. A subexcitable BZ medium responds to an asymmetric perturbation by producing traveling localized excitation wave-fragments similar to dissipative solitons. We employ interactions between excitation wave-fragments to perform the computation. We interpret the wave-fragments as values of Boolean variables. The presence of a wave-fragment at a given site of a circuit represents the logical truth, absence of the wave-fragment — logically false. Fredkin gate consists of ten excitable channels intersecting at 11 junctions, eight of which are subexcitable. Toffoli gate consists of six excitable channels intersecting at six junctions, four of which are subexcitable. The designs of the gates are verified using numerical integration of two-variable Oregonator equations.