Photosensitive Schottky Barrier Diode Based on Cu/p-SnSe Thin Film Fabricated by Thermal Evaporation

Tin Selenide (SnSe), a group IV-VI compound semiconductor material is used to fabricate various solid state devices such as memory switching devices, P-N junction diodes, Schottky barrier diodes, etc. In...

Watt-Level Ka-Band Integrated Doherty Power Amplifiers: Technologies and Power Combination Strategies Invited Paper

This paper discusses some of the design choices underlying the development of watt-level integrated Doherty power amplifiers in the K and Ka band, focusing on compound semiconductor technologies. The key aspect of on-chip power combination is discussed, presenting and comparing some of the possible alternatives. Then, the impact on the achievable bandwidth and performance of different parameters is quantified, adopting an approximate analysis, which focuses on the Doherty output combiner and allows estimating the non-linear performance of the amplifier thanks to some simplifying assumptions, without requiring a full, non-linear model of the active devices. Two sample GaAs and GaN technologies are compared first, considering parameters that are representative of the currently available commercial processes, and then several power combination strategies are analyzed, adopting the GaN technology, which is currently the only one that allows achieving the power levels required by the applications directly on chip. Finally, some hints as to the impact of the output parasitic effects of the transistors on the presented analysis are given.

GaAs-Based Serial-Input-Parallel-Output Interfaces for Microwave Core-Chips

Microwave core-chips are highly integrated MMICs that are in charge of all the beam-shaping functions of a transmit-receive module within a phased array system. Such chips include switches, amplifiers and attenuators, phase shifters, and possibly other elements, each to be controlled by external digital signals. Given the large number of control lines to be integrated in a core-chip, the embedding of a serial to parallel interface is indispensable. Digital design in compound semiconductor technology is still rather challenging due to the absence of complementary devices and the availability of a limited number of metallization layers. Moreover, in large arrays, high chip yield and repeatability are required. This paper discusses and compares challenges and solutions for the key sub-circuits of GaAs serial to parallel converters for core-chip applications, reviewing the pros and cons of the different implementations proposed in the literature.