GPU Domain Specialization via Composable On-Package Architecture

As GPUs scale their low-precision matrix math throughput to boost deep learning (DL) performance, they upset the balance between math throughput and memory system capabilities. We demonstrate that a converged GPU design trying to address diverging architectural requirements between FP32 (or larger)-based HPC and FP16 (or smaller)-based DL workloads results in sub-optimal configurations for either of the application domains. We argue that a C omposable O n- PA ckage GPU (COPA-GPU) architecture to provide domain-specialized GPU products is the most practical solution to these diverging requirements. A COPA-GPU leverages multi-chip-module disaggregation to support maximal design reuse, along with memory system specialization per application domain. We show how a COPA-GPU enables DL-specialized products by modular augmentation of the baseline GPU architecture with up to 4× higher off-die bandwidth, 32× larger on-package cache, and 2.3× higher DRAM bandwidth and capacity, while conveniently supporting scaled-down HPC-oriented designs. This work explores the microarchitectural design necessary to enable composable GPUs and evaluates the benefits composability can provide to HPC, DL training, and DL inference. We show that when compared to a converged GPU design, a DL-optimized COPA-GPU featuring a combination of 16× larger cache capacity and 1.6× higher DRAM bandwidth scales per-GPU training and inference performance by 31% and 35%, respectively, and reduces the number of GPU instances by 50% in scale-out training scenarios.

Discovery of key function module in complex mechanical 3D CAD assembly model for design reuse

Purpose Complex mechanical 3D computer-aided design (CAD) model embodies rich implicit design knowledge. Through discovering the key function parts and key function module in 3D CAD assembly model in advance, it can promote the designers’ understanding and reuse efficiency of 3D assembly model in design reuse. Design/methodology/approach An approach for discovering key function module in complex mechanical 3D CAD assembly model is proposed. First, assembly network for 3D CAD assembly model is constructed, where the topology structure characteristics of 3D assembly model are analyzed based on complex network centrality. The degree centrality, closeness centrality, betweenness centrality and mutual information of node are used to evaluate the importance of the parts in 3D assembly model. Then, a multi-attribute decision model for part-node importance is established, and the comprehensive evaluation for key function parts in 3D assembly model is accomplished by combining Analytic Hierarchy Process and Technique for Order Preference by Similarity to an Ideal Solution (TOPSIS). Subsequently, a community discovery of function module in assembly model-based Clauset–Newman–Moore (CNM)-Centrality is given in details. Finally, 3D CAD assembly model of worm gear reducer is taken as an example to verify the effectiveness and feasibility of proposed method. Findings The key function part in CAD assembly model is evaluated comprehensively considering assembly topology more objectively. In addition, the key function module containing key function part is discovered from CAD assembly model by using CNM-Centrality-based community discovery. Practical implications The approach can be used for discovering important design knowledge from complex CAD assembly model when reusing the assembly model. It can help designers capture and understand the design thinking and intent, improve the reuse efficiency and quality. Originality/value The paper first proposes an approach for discovering key function module in complex mechanical 3D CAD assembly model taking advantage of complex network theory, where the key function part is evaluated using node centrality and TOPSIS, and the key function module is identified based on community discovery.

An Extensible Compiler for Implementing Software Design Patterns as Concise Language Constructs

Design patterns are generic solutions to common programming problems. Design patterns represent a typical example of design reuse. However, implementing design patterns can lead to several problems, such as programming overhead and traceability. Existing research introduced several approaches to alleviate the implementation issues of design patterns. Nevertheless, existing approaches pose different implementation restrictions and require programmers to be aware of how design patterns should be implemented. Such approaches make the source code more prone to faults and defects. In addition, existing design pattern implementation approaches limit programmers to apply specific scenarios of design patterns (e.g. class-level), while other approaches require scattering implementation code snippets throughout the program. Such restrictions negatively impact understanding, tracing, or reusing design patterns. In this paper, we propose a novel approach to support the implementation of software design patterns as an extensible Java compiler. Our approach allows developers to use concise, easy-to-use language constructs to apply design patterns in their code. In addition, our approach allows the application of design patterns in different scenarios. We illustrate our approach using three commonly used design patterns, namely Singleton, Observer and Decorator. We show, through illustrative examples, how our design pattern constructs can significantly simplify implementing design patterns in a flexible, reusable and traceable manner. Moreover, our design pattern constructs allow class-level and instance-level implementations of design patterns.

A Python based Design Verification Methodology

While the UVM-constrained random and coverage-driven verification methodology revolutionized IP and unit-level testing, it falls short of SoC-level verification needs. A solution must extend from UVM and enable vertical (IP to SoC) and horizontal (verification engine portability) reuse to completely handle SoC-level verification. To expedite test-case generation and use rapid verification engines, it must also provide a method to collect, distribute, and automatically amplify use cases. Opting a Python-based Design Verification approach opens the door to various such merits. Cocotb is a very useful, growing methodology which can be used for the same. This paper elaborates on the application of cocotb, an open-source framework hosted on Github which is based on CO-routine and CO-simulation of Testbench environment for verifying VHDL/Verilog RTL using Python. It employs equivalent design-reuse and functional verification concepts like UVM, however is implemented in Python, which is much simpler to understand and that leads to faster development and reduces the turnaround time.

Towards a Better Understanding of Open Source Hardware Design Reuse in Company-Community Collaboration

The open-source-software movement that emerged in the late 90s has recently extended to hardware. In this paper, we try to better understand how the reuse of design solutions facilitates company-community collaboration. On the one hand, based on existing research studies, we analyze three fundamental questions - 1) who wants to reuse a design? 2) Why do they want to reuse a design?, and 3) How do they reuse a design? - from a company perspective and a community perspective. On the other hand, we identified that companies and communities must create a common understanding of the design problems and solution and they could benefit in reusing design artifact to speed up the development time and improve the quality and transferability of the results. However, this research shows that companies and communities don’t use the same type of tools and methods to reuse design knowledge which may cause some problems for collaboration [2].

Design and Architecture of Jxta-Based Game Software in Java

This paper discusses the interest of explicit software processes of design and architecture for (1) architectural view understanding and communication, (2) design reuse and principles of Jxta-based game software development. The considered architecture includes hierarchical and logical views which are modeled in the Java-based Maiar API and achieved by Jxta message exchanges. The topology of the world map of the game software can be viewed as undirected graph in which vertices (nodes) represent the rooms and the edges represent the rooms and the edges represent the playable movements between nodes.<div><br></div><div><br></div>

Design and Architecture of Jxta-Based Game Software in Java

This paper discusses the interest of explicit software processes of design and architecture for (1) architectural view understanding and communication, (2) design reuse and principles of Jxta-based game software development. The considered architecture includes hierarchical and logical views which are modeled in the Java-based Maiar API and achieved by Jxta message exchanges. The topology of the world map of the game software can be viewed as undirected graph in which vertices (nodes) represent the rooms and the edges represent the rooms and the edges represent the playable movements between nodes.<div><br></div><div><br></div>