Study on the divertor plasma behavior through sweeping strike point in the new lower divertor on EAST

A series of L-mode discharges have been conducted in the new ‘corner slot’ divertor on the Experimental Advanced Superconducting Tokamak (EAST) to study the divertor plasma behavior through sweeping strike point. The plasma control system controls the strike point sweeping from the horizontal target to the vertical target through poloidal field coils, with keeping the main plasma stability. The surface temperature of the divertor target cools down as the strike point moves away, indicating that sweeping strike point mitigates the heat load. To avoid the negative effect of probe tip damage, a method based on sweeping strike point is used to get the normalized profile and study the decay length of particle and heat flux on the divertor target λ js , λ q .In the discharges with high radio-frequency (RF) heating power, electron temperature T e is lower and λ js is larger when the strike point locates on the horizontal target compared to the vertical target, probably due to the corner effect. In the Ohmic discharges, λ js , λ q are much larger compared to the discharges with high RF heating power, which may be attributed to lower edge T e .

Improved DC Performance Analysis of a Novel Asymmetric Extended Source Tunnel FET for Fast Switching Application

A two-dimensional analytical model for asymmetric extended source tunnel field effect transistor (AES-TFET) has been developed to obtain better device performance. The proposed device model has been analytically modelled and performed by solving 2-D Poisson’s equation. Surface potential distribution, electric field variation and band-to-band tunneling (BTBT) rate have been investigated by this numerical modelling. The source region of novel structure of TFET has been extended (varied 2 nm to 6 nm) to incorporate corner effect, which allows BTBT through a thin tunneling barrier, with controlled ambipolar conduction. This eventually produces better source-channel interface tunneling for a n-channel AES-TFET. 2-D numerical device simulator (SILVACO TCAD) has been used for simulation work. The simulated work has been finally validated by analytical modelling of AES-TFET. Better ION, IOFF and switching ratio has been obtained from this novel TFET structure.

Physics Based Analytical Modeling of Asymmetric Elevated Source Tunnel FET (AES-TFET) for Better Tunnel Junction Device (TJD) Performance

In this paper, a two-dimensional analytical model for asymmetric elevated source tunnel field effect transistor (AES-TFET) has been developed to obtain better tunnel junction device performance. Device physics based analytical modelling is performed by solving 2-D Poisson’s equation. Surface potential distribution, electric field variation and band-to-band tunneling (B2B) rate have been investigated by this numerical modelling. In our proposed structure, the source has been elevated (varied 2 nm to 6 nm) to incorporate corner effect; which boosts the carrier transport via thin tunneling barrier, with controlled ambipolar conduction. This eventually produces better source-channel interface tunneling for a n-channel AES-TFET structure. 2-D numerical device simulator (SILVACO TCAD) has been used for simulation work. The simulated graphical representations have been finally validated by analytical modelling of AES-TFET.

Using the Hexagonal Layout Style for MOSFETs to Boost the Device Matching in Ionizing Radiation Environments

This paper describes an experimental comparative study of the matching between conventional (rectangular gate shape) and Diamond (hexagonal gate geometry) n-channel Metal-Oxide-Semiconductor (MOS) Field Effect Transistors (MOSFETs), which were manufactured in an 130 nm Silicon-Germanium Bulk Complementary MOS (CMOS) technology and exposed to different X-rays Total Ionizing Doses (TIDs). The results indicate that the Diamond layout style with alpha () angle equal to 90˚ for MOSFETs is capable of boosting the device matching by at least 17% regarding the electrical pa-rameters studied (Threshold Voltage and Subthreshold Slope) as compared with the conventional MOSFET counterparts, considering that they present the same gate area, channel width, bias conditions and for the same TID. This is due to the Longitudinal Corner Effect (LCE). Parallel MOSFETs with Different Channel Length Effect (PAMDLE) and Deactivation of Parasitic MOSFETs in the Bird’s Beak Regions Effect (DEPAMBBRE) present in the structure of Diamond MOSFETs. Therefore, the Diamond layout style can be consid-ered an alternative hardness-by-design (HBD) layout strategy to boost the electrical performance and TID tolerance of MOSFETs enabling analog or radio-frequency CMOS inte-grated circuits (ICs) applications.

Data-Driven Field Observational Method of a Contiguous Bored Pile Wall System Affected by Accidental Groundwater Drawdown

This paper presents the use of a 700 mm-diameter contiguous bored pile (CBP) wall for a main basement deep excavation project with cut-and-cover tunnel. Due to the presence of cement grout columns between piles behind the CBP wall, the main basement was considered to be ‘impermeable’. However, site observations have shown that installation of ground anchors have unintentionally punctured the water tightness of the wall, creating leakages through the CBP wall and the possibility of localized groundwater lowering, as evidenced by the relatively large settlements. In the absence of cement grout columns at the cut-and-cover tunnel section, immediate groundwater drawdown was observed with the excavation rate. Settlement induced by the excavation and groundwater drawdown only slowed down upon the casting of skinwall to prevent groundwater from flowing through the wall. The accidental groundwater leakage led to small wall deflection. The ratio of maximum settlement to maximum deflection is atypical to those reported in the literature. The analysis also revealed that corner effect is significant with smaller settlement registered at the corners of the wall.