memory chip
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2022 ◽  
Vol 129 ◽  
pp. 114474
Author(s):  
Guangjun Zhang ◽  
Yanfeng Jiang
Keyword(s):  

2021 ◽  
Vol 9 (12) ◽  
pp. 1352
Author(s):  
Dagoberto De León-Gordillo ◽  
Noé Amir Rodríguez-Olivares ◽  
Leonardo Barriga-Rodríguez ◽  
José Luis Sánchez-Gaytán ◽  
Jorge Alberto Soto-Cajiga ◽  
...  

Submarine gliders are specialized systems used in applications such as environmental monitoring of marine fauna, in the oil industry, among others. The glider launch and capture is a costly process that requires substantial technological and human resources, so the orderly and error-free storage of data is of fundamental importance due to the subsequent analysis. The amount of information being obtained from the seabed is increasing, this leads to the need to develop robust and low-cost ad-hocsystems for this type of application. The challenge is the integration of the different software layers in the storage system because the monitored variables must be ordered according to different glider operations such as calibration data update and navigation. Additionally, to avoid data corruption in the memory chip, error control coding must be used. The goal of this paper is to present a novel design of different layers of software integrated into a datalogger: reception, error control, and storage logic for the different glider operations. The design of the datalogger is based on a NAND flash memory chip and an MSP430 microcontroller. To correct bit-flipping errors, a BCH code that corrects 4 errors for every 255 bits is implemented into the microcontroller. The design and evaluation are performed for different glider operations, and for different lengths and correction capabilities of the BCH module. A test to calculate the storage time has been carried out. This test shows that in the case of 256 bytes per sample, at 30 samples per minute, and 1 GB of storage capacity, it is possible to collect data from the glider sensors for 84 days. The results obtained show that our device is a useful option for storing underwater sensor data due to its real-time storage, power consumption, small size, easy integration, and its reliability, where the bit error rate BER is of 2.4 ×10−11.


Nanoscale ◽  
2021 ◽  
Author(s):  
Zhitang Song ◽  
Daolin Cai ◽  
Yan Cheng ◽  
Lei Wang ◽  
Shilong Lv ◽  
...  

Correction for ‘12-state multi-level cell storage implemented in a 128 Mb phase change memory chip’ by Zhitang Song et al., Nanoscale, 2021, DOI: 10.1039/d1nr00100k.


Nanoscale ◽  
2021 ◽  
Author(s):  
Zhitang Song ◽  
Daolin Cai ◽  
Yan Cheng ◽  
Lei Wang ◽  
Shilong Lv ◽  
...  

128 Mb Phase Change Memory (PCM) chips show potential for many applications in artificial intelligence.


Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1619
Author(s):  
Luis Alberto Aranda ◽  
Alfonso Sánchez-Macián ◽  
Juan Antonio Maestro

Electronic circuits in harsh environments, such as space, are affected by soft errors produced by radiation. A single event functional interrupt (SEFI) can affect the behavior of a memory chip, with one or more rows, columns or even the whole device producing a wrong value when reading a set of stored bits. This problem may affect raw Bayer images stored in satellites and other spacecraft. In this paper, we present a methodology to analyze how different interpolation algorithms behave when they try to reconstruct the affected Bayer images into standard red, green and blue (RGB) images. This methodology can be used to compare and develop new fault-tolerant algorithms. The proposed methodology has been illustrated by studying a subset of interpolation algorithms. The results obtained from this example show that the interpolation algorithms that traditionally offer better results in a normal operation (in the absence of errors) are not always the best when SEFI errors are present in the Bayer images.


Author(s):  
Sherif Hany ◽  
Sunsoo Byun ◽  
Hossam Sarhan ◽  
Dina Medhat ◽  
Mohamed ElRefaee ◽  
...  

Author(s):  
Nilay R. Mistry ◽  
Binoj Koshy ◽  
Mohindersinh Dahiya ◽  
Chirag Chaudhary ◽  
Harshal Patel ◽  
...  

Smartphone usage has increased in the recent past and has become an extension of the personal computer, so has the complexity of forensic investigation. Vital information on these devices makes them more critical especially when it is part of investigative evidences. The challenge here is the extraction of data, especially when the phone is logically or physically damaged. Chip-off is a niche technique, involving removal of Flash Memory chip with due sophistication, this then is subjected to direct extraction and analysis. Apple iPhones are robust and well locked; the study performed chip-off on model A1203 that revealed vital forensic evidences.


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