Vector Analysis of Electrical Networks for Temperature Measurement of MOS Power Transistors

The article presents the concept of using VNA (Vector Network Analyzer) to measure the temperature of the MOS transistor junction. The method assumes that the scattering parameters of the network consisting of the transistor depend on the temperature. The tests confirmed the influence of temperature on the S11 parameter and the input network capacity during ambient temperature changes in the range of 35–70 °C. Measurements were made for the gate-source (G-S) input of the system. The measurements were carried-out with the transistor in the ON/OFF states. In order to validate the measurements, the temperature of the tested element was recorded with the MWIR Cedip-Titanium thermal imaging camera.

A CMOS Active Rectifier with Efficiency-Improving and Digitally Adaptive Delay Compensation for Wireless Power Transfer Systems

A CMOS active rectifier with digitally adaptive delay compensation for power efficiency improvement is presented in this work. The power transistors are turned on and turned off in advance under the control of the regenerated compensation signals, which are generated by the proposed compensation control circuit; therefore, the reverse current is eliminated, and the efficiency is increased. Simulation results in a standard 0.18 μm CMOS process show that the turn-on and turn-off delay of the rectifier is effectively compensated. The power efficiency is up to 90.6% when the proposed rectifier works at the operation frequency of 13.56 MHz.

A SPICE Model for IGBTs and Power MOSFETs Focusing on EMI/EMC in High-Voltage Systems

We describe two models of Power Transistors (IGBT, MOSFET); both were successfully used for the analysis of electromagnetic interference (EMI) and electromagnetic compatibility (EMC) while modeling high-voltage systems (PFC, DC/DC, inverter, etc.). The first semi-mathematical–behavioral insulated-gate bipolar transistor (IGBT) model introduces nonlinear negative feedback generated in the semiconductor’s p+ and n+ layers, which are located near the metal contact of the IGBT emitter, to better describe the dynamic characteristics of the transistor. A simplified model of the metal–oxide-semiconductor field-effect transistor (MOSFET) in the IGBT is used to simplify this IGBT model. The second simpler behavioral model could be used to model both IGBTs and MOSFETs. Model parameters are obtained from datasheets and then adjusted using results from a single measurement test. Modeling results are compared with measured turn-on and turn-off waveforms for different types of IGBTs. To check the validation of the models, a brushless DC electric motor test setup with an inverter was created. Despite the simplicity of the presented models, a comparison of model predictions with hardware measurements revealed that the model accurately forecasted switch transients and aided EMI–EMC investigations.

Dirac-Source Diode with Sub-unity Ideality Factor

An increase in power consumption necessitates a low-power circuit technology to extend Moore’s law. Low-power transistors, such as tunnel field-effect transistors (TFETs)1-5, negative-capacitance field-effect transistors (NC-FETs)6, and Dirac-source field-effect transistors (DS-FETs)7-10, have been realised to break the thermionic limit of the subthreshold swing (SS). However, a low-power diode rectifier, which breaks the thermionic limit of an ideality factor (η) of 1 at room temperature, has not been proposed yet. In this study, we have realised a DS diode, which exhibits a steep-slope characteristic curve, by utilising the linear density of states (DOSs) of graphene7. For the developed DS diode, η < 1 for more than two decades of drain current with a minimum value of 0.8, and the rectifying ratio is large (> 105). The realisation of a DS diode paves the way for the development of low-power electronic circuits.