High-Temperature Single-Electron Transistors Based on Molecules and Small Nanoparticles.

The material of the defense of the dissertation for the degree of Doctor of Physical and Mathematical Sciences – the first in Russia doctoral dissertation on molecular singe-electronics is presented. The relevance of the development, creation and research of single-electron transistorswith high charge energy and operating temperature for the creation of fundamentally new nanoelectronic devices applicable in wide practice and ensuring breakthrough research in various fields is noted, the necessity of using quantum dots (molecules/nanoparticles) of atomic-molecular scale for this is shown, the formulation of the research problems is formulated, the physical and technological methods of fabrication and analysis used are listed, the main results of the work are presented and their significance for the development of highly sensitive sensing, quantum informatics and quantum metrology is discussed.

High-frequency rectifying characteristics of metallic single-electron transistor with niobium nanodots

Metallic single-electron transistors (SETs) with niobium nanodots were fabricated, and their high-frequency rectifying characteristics were evaluated. By reducing the gap size of the electrodes and film deposition area to nanometer scale, improved SET characteristics with gate control, and better frequency response of the rectifying current with gentler decrease than 1/f at high frequency were achieved. The comparison between the characteristics of micrometer- and nanometer-size devices are made, and the reason for their differences are discussed with a help of simulation based on the experimentally extracted parameters.

Investigating two−stage degradation of threshold voltage induced by off−state stress in AlGaN/GaN HEMTs

In this work, a two-step degradation phenomenon in D-mode Si3N4/AlGaN/GaN metal-insulator-semiconductor high−electron−transistors (MIS−HEMT) is discussed systematically. During off−state stress, threshold voltage shifts positively for a short duration, and is followed by a negative shift. In contrast, the off−state leakage continues to decrease throughout the entire stress. Results of varied measurement conditions indicate that carrier trapping at different regions dominates this phenomenon. It is interesting that under a large lateral electric field, electron−hole pairs are generated and will then be trapped at the gate dielectric layer. Furthermore, when increasing the stress temperature, impact ionization due to carriers from the gate electrode becomes more severe. Finally, devices with different gate insulator (GI) thicknesses are performed to verify the physical model of the degradation behavior.

Novel Hybrid SETMOS Logic for Ultra-low-power Applications

This paper investigates the Single-GateSingle Electron Transistors (SG-SETs) based hybrid SETMOS logic circuits for ultra-low-power applications at room temperature. The methodological design of the proposed hybrid SETMOS logic circuits is compatible with 22- nm CMOS bias and process. The widely acclaimed Mahapatra-IonescuBannerjee (MIB) model is modified to implement the proposed SG-SET and hybrid SETMOS logic circuits using Verilog-A. Logic inverter, two-input NAND, NOR, AND, OR, EX-OR, and EX-NOR logic gates are simulated at room temperature using novel SETMOS hybridization. The proposed work is compared with the 22-nm CMOS counterpart (simulated with the same setup). We found that the reduction in total power dissipation by 98.04%, 96.45%, 94.65%, 93.7%, 92.63%, 93.52%, 95.57% using hybrid SETMOS NAND, NOR, AND, EX-OR and EXOR gates than 22 nm CMOS logic gates. The proposed work is compared with other works of literature. We also examined the robustness of the proposed logic circuits against temperature variations from 77 K to 500 K.

Radio-frequency single electron transistors in physically defined silicon quantum dots with a sensitive phase response

Radio-frequency reflectometry techniques are instrumental for spin qubit readout in semiconductor quantum dots. However, a large phase response is difficult to achieve in practice. In this work, we report radio-frequency single electron transistors using physically defined quantum dots in silicon-on-insulator. We study quantum dots which do not have the top gate structure considered to hinder radio frequency reflectometry measurements using physically defined quantum dots. Based on the model which properly takes into account the parasitic components, we precisely determine the gate-dependent device admittance. Clear Coulomb peaks are observed in the amplitude and the phase of the reflection coefficient, with a remarkably large phase signal of ∼45°. Electrical circuit analysis indicates that it can be attributed to a good impedance matching and a detuning from the resonance frequency. We anticipate that our results will be useful in designing and simulating reflectometry circuits to optimize qubit readout sensitivity and speed.