inverter topology
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2022 ◽  
Vol 18 (1) ◽  
pp. 48-57
Author(s):  
Aws Al-Jrew ◽  
Jawad Mahmood ◽  
Ramzy Ali

In this article, a comparison of innovative multilevel inverter topology with standard topologies has been conducted. The proposed single phase five level inverter topology has been used for induction heating system. This suggested design generates five voltage levels with a fewer number of power switches. This reduction in number of switches decreases the switching losses and the number of driving circuits and reduce the complexity of control circuit. It also reduces the cost and size for the filter used. Analysis and comparison has been done among the conventional topologies (neutral clamped and cascade H-bridge multilevel inverters) with the proposed inverter topology. The analysis includes the total harmonic distortion THD, efficiency and overall performance of the inverter systems. The simulation and analysis have been done using MATLAB/ SIMULINK. The results show good performance for the proposed topology in comparison with the conventional topologies.


Author(s):  
Phanikumar Chamarthi ◽  
Vivek Agarwal Ph.D. ◽  
Mohamed Shawky El Moursi ◽  
Vinod Khadkikar

Electronics ◽  
2021 ◽  
Vol 10 (24) ◽  
pp. 3099
Author(s):  
Mohd Asif ◽  
Mohd Tariq ◽  
Adil Sarwar ◽  
Md Reyaz Hussan ◽  
Shafiq Ahmad ◽  
...  

Multilevel inverters (MLIs) are used on a large scale because they have low total harmonic distortion (THD) and low voltage stress across the switches, making them ideal for medium- and high-power applications. The authenticity of semiconductor devices is one of the main concerns for these MLIs to operate properly. Due to the large number of switches in multilevel inverters, the possibility of a fault also arises. Hence, a reliable five-level inverter topology with fault-tolerant ability has been proposed. The proposed topology can withstand an open-circuit (OC) fault caused when any single switch fails. In comparison to typical multilevel inverters, the proposed topology is fault-tolerant and reliable. The simulation of the proposed topology is conducted in MATLAB-Simulink and PLECS software packages, and the results obtained for normal pre-fault, during-fault, and after-fault conditions are discussed. Experimental results also prove the proposed cell topology’s robustness and effectiveness in tolerating OC faults across the switches. Furthermore, a thorough comparison is provided to demonstrate the proposed topology’s superiority compared to recently published topologies with fault-tolerant features.


Author(s):  
Muhammad Munib ◽  
Khurram Karim Qureshi ◽  
Jason Gu ◽  
Muhammad Usman Asad ◽  
Naureen Butt ◽  
...  

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Jagabar Sathik M. ◽  
Dhafer J. Almakhles

AbstractDeveloping of new photovoltaic inverter topologies is received more attention in the last few years. In particular, designing an active neutral-point-clamping inverter type structure is quite popular for PV applications. The output voltage is always half of the input voltage (vin), which further increases the voltage rating of dc-link capacitors in the conventional three-level ANPC. To rectify the above problem and increase the output voltage by reducing dc-link capacitors voltage rating, a new boost type seven-level ANPC inverter topology is proposed. The proposed topology consists of seven switches and one floating capacitor. The floating capacitor voltage is self-balanced, and the output voltage is 1.5 times higher than the input voltage. A detailed comparison for some power components, power loss and cost with other existing topologies are presented. Further, the proposed topology is validated in a prototype hardware setup for different load values.


Energies ◽  
2021 ◽  
Vol 14 (22) ◽  
pp. 7726
Author(s):  
Charles Ikechukwu Odeh ◽  
Dmytro Kondratenko ◽  
Arkadiusz Lewicki ◽  
Marcin Morawiec ◽  
Andrzej Jąderko ◽  
...  

This article presents a carrier-based pulse-width modulation (PWM) template for a 5-level, H bridge-based cascaded multilevel inverter (MLI). The developed control concept generates adequate modulation template for this inverter topology wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. With this modulation approach, classical multiplicity and synchronization of the triangular carrier signals criterion for the extension of sinusoidal pulse-width modulation, SPWM, to several cascaded 5-level, H-bridge-based MLI topology are removed. The proposed template can be used on the inverter configuration of any level with no further control modification. Nearly even distribution of switching pulses and equalized individual cascaded cell output power were achieved with the proposed modulation scheme. Three 5-level, H-bridge-based MLI units were cascaded for 1-phase, 13-level inverter operation; simulation and experimental results are adequately presented.


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