A Fresh Design of Power Effective Adapted Vedic Multiplier for Modern Digital Signal Processors

The Multiply Accumulate (MAC) unit constructed using antiquated Vedic mathematical practice and the efficiency of the vertical and transversely of Vedic approach for multiplication, which gives a distinction in genuine cycle of Multiplier itself. Vedic-Mathematics is depend on 16-Sutras, in that Urdhva-Triyakbhyam (UT) more productive one. It literally means vertical and cross wise operations. It eliminates unwanted multiplication and allows the parallel creation of partial products and addition steps. The adders are utilized to append the partial-product generated in the Vedic mathematics methodology to drops the combinational lag. MAC is an essential unit in the digital signal processors, to show the characters like speed, power as well as area. Hence, finer multiplier plans are to increase the order of the system. The Modified sum product algorithm based Vedic multiplier is one such promising solution. It has a rapid multiplication process and reaches a less calculation complexity above its traditional multiplier. Array multiplier, Baugh-Wooley multiplier, Wallace-tree multiplier and Vedic multiplier were created in the existing work. In proposed work Vedic multiplier, using modified sum product algorithm was designed. The structure design coded in verilog and parameter analysis was done in Xilinx. The parameters like delay as well as power were compare between existing and proposed. When comparing with different multiplier with our proposed work delay get reduced. Comparing with existing multiplier the proposed 4x4 Vedic multiplier have 49.12% reduction in delay. Comparing with existing multiplier the proposed Vedic 4x4 multiplier have 42.51% reduction in power.

Hardware–Software Co-Design for Decimal Multiplication

Decimal arithmetic using software is slow for very large-scale applications. On the other hand, when hardware is employed, extra area overhead is required. A balanced strategy can overcome both issues. Our proposed methods are compliant with the IEEE 754-2008 standard for decimal floating-point arithmetic and combinations of software and hardware. In our methods, software with some area-efficient decimal component (hardware) is used to design the multiplication process. Analysis in a RISC-V-based integrated co-design evaluation framework reveals that the proposed methods provide several Pareto points for decimal multiplication solutions. The total execution process is sped up by 1.43× to 2.37× compared with a full software solution. In addition, 7–97% less hardware is required compared with an area-efficient full hardware solution.

Grouping Mechanisms in Numerosity Perception

Enumeration of a dot array is faster and easier if the items form recognizable subgroups. This phenomenon, which has been termed “groupitizing,” appears in children after one year of formal education and correlates with arithmetic abilities. We formulated and tested the hypothesis that groupitizing reflects an ability to sidestep counting by using arithmetic shortcuts, for instance, using the grouping structure to add or multiply rather than just count. Three groups of students with different levels of familiarity with mathematics were asked to name the numerosity of sets of 1–15 dots in various arrangements, for instance, 9 represented as a single group of 9 items, three distinct groups of 2, 3, and 4 items (affording addition 2 + 3 + 4), or three identical groups of 3 items (affording multiplication 3 × 3). Grouping systematically improved enumeration performance, regardless of whether the items were grouped spatially or by color alone, but only when an array was divided into subgroups with the same number of items. Response times and error patterns supported the hypothesis of a multiplication process. Our results demonstrate that even a simple enumeration task involves mental arithmetic.

Improving the Performance of RLizard on Memory-Constraint IoT Devices with 8-Bit ATmega MCU

We propose an improved RLizard implementation method that enables the RLizard key encapsulation mechanism (KEM) to run in a resource-constrained Internet of Things (IoT) environment with an 8-bit micro controller unit (MCU) and 8–16 KB of SRAM. Existing research has shown that the proposed method can function in a relatively high-end IoT environment, but there is a limitation when applying the existing implementation to our environment because of the insufficient SRAM space. We improve the implementation of the RLizard KEM by utilizing electrically erasable, programmable, read-only memory (EEPROM) and flash memory, which is possessed by all 8-bit ATmega MCUs. In addition, in order to prevent a decrease in execution time related to their use, we improve the multiplication process between polynomials utilizing the special property of the second multiplicand in each algorithm of the RLizard KEM. Thus, we reduce the required MCU clock cycle consumption. The results show that, compared to the existing code submitted to the National Institute of Standard and Technology (NIST) PQC standardization competition, the required MCU clock cycle is reduced by an average of 52%, and the memory used is reduced by approximately 77%. In this way, we verified that the RLizard KEM works well in our low-end IoT environments.

An Area Efficient Wallace Tree Multiplier using Modified Full Adder

Multipliers play a significant task in digital signal processing applications and application-specific integrated circuits. Wallace tree multipliers provide a high-speed multiplication process with an area-efficient strategy. It is realized in hardware using full adders and half adders. The optimization of adders can further improve the performance of multipliers. Wallace tree multiplier with modified full adder using NAND gate is proposed to achieve reduced silicon area, high speed and low power consumption. The conventional full adder implemented by XOR, AND, OR gates is replaced by the modified full adder realized using NAND gate. The proposed Wallace tree multiplier includes 544 transistors, while the conventional Wallace tree multiplier has 584 transistors for 4-bit multiplication.

A Multiplication Algorithm

Paper Setup must be in A4 size with Margin: Top 0.7”, Bottom 0.7”, Left 0.65”, 0.65”, Gutter 0”, and Gutter Position Top. Pap Abstract: Multiplication is common arithmetic operation in ALU. Many algorithm are proposed for multiplying two unsigned numbers in literature. This paper proposes algorithm to multiply two unsigned binary numbers of any size. The most significant two bits are used to determine the partial product by bit inspection. The rest of partial products are obtained by suitably shifting the previous partial products and adding the terms involving remainders. The remainder is obtained by taking one bit at a time from the MSB-2 position assuming numbers are indexed from zero in LSB to maximum-1 in MSB. The multiplication process is performed as series of additions, shifts in this method. The proposed method is simulated in Quartus2 Toolkit. It is compared to the in-built multiplication process of the tool. A timing improvement of 9.5% with comparable power consumption is obtained with same pin count.

Grouping mechanisms in numerosity perception

Enumeration of a dot array is faster and easier if the items form recognizable subgroups. This phenomenon, which has been termed groupitizing, appears in children after one year of formal education and correlates with arithmetic abilities. We formulated and tested the hypothesis that groupitizing reflects an ability to sidestep counting by using arithmetic shortcuts, for instance using the grouping structure to add or multiply rather than just count. Three groups of students with different levels of familiarity with mathematics were asked to name the numerosity of sets of 1-15 dots in various arrangements, for instance 9 represented as a single group of 9 items, three distinct groups of 2, 3, and 4 items (affording addition 2+3+4), or three identical groups of 3 items (affording multiplication 3x3). Grouping systematically improved enumeration performance, regardless of whether the items were grouped spatially or by color alone, but only when an array was divided into subgroups with the same number of items. Response times and error patterns supported the hypothesis of a multiplication process. Our results demonstrate that even a simple enumeration task implicitly involves mental arithmetic.

Testing the stability of money multupliers for Croatia

This paper analyses the stability of monetary multiplication process in Croatia and its forecasting ability. The money multiplier approach assumes that the monetary authorities are able to control the monetary base through money multipliers by affecting the money supply and the rate of inflation. Thus, by controlling the monetary base, monetary authorities can achieve price stability. For implementing an effective and accurate monetary policy, money multipliers should be stable. The stability of money multipliers implies that different measures of money supply (i.e. different monetary aggregates) and reserve money are stationary or that different measures of money supply and reserve money are cointegrated. Therefore, the purpose of this paper is to test for the stationarity of money multipliers and to determine the long-run relationship between different monetary aggregates and reserve money for Croatia using monthly data in the period from 2011 to 2019 and the bounds testing (ARDL) approach for cointegration. The results of the unit-root tests indicate that money multipliers are nonstationary, therefore unstable and inappropriate for the short-run policy purpose. On the other side, the existence of stable cointegration relationships suggests the validity of the money multiplier model in the long-run

Estratégias e Metodologias para o Ensino-Aprendizagem da Operação Aritmética da Multiplicação utilizando Tópicos da História da Matemática

Resumo As dificuldades no ensino-aprendizagem das operações aritméticas podem interferir na aquisição de algumas competências matemáticas básicas e, de certo modo, influenciar futuros processos de cálculo. Uma abordagem diferente, como a utilização de tópicos de História da Matemática, pode revelar-se uma boa estratégia para motivar os alunos e encaminhá-los para um conhecimento eficaz das referidas operações. Muitos foram os povos que aplicaram técnicas, processos, métodos e algoritmos na resolução de problemas do quotidiano ao longo da história. A Matemática de então tinha um cunho mais prático do que teórico, que decorria diretamente das necessidades diárias. Abordando estes meios ancestrais podemos cativar e estimular os alunos para as operações aritméticas, nomeadamente, a operação de multiplicação.Neste trabalho descrevemos o modo como alguns povos procediam à operação de multiplicação, bem como os métodos usados para tal, nomeadamente: a duplicação no Antigo Egito; a gelosia e o zigzag na India medieval; os bastões de Napier; a multiplicação com as mãos no Renascimento; e o processo de multiplicação do povo Yoruba.A utilização de diversos ábacos e o uso de outros materiais de efeito similar, como os bastões de Napier, podem ser um excelente complemento às estratégias para a aprendizagem da operação de multiplicação. Palavras-chave: operação de multiplicação; história da matemática Abstract The difficulties in teaching-learning of arithmetic operations can interfere with the acquisition of some basic mathematical skills and, in a way, influence future computation processes. A different approach, such as the use of topics in the History of Mathematics, may prove to be a good strategy to motivate students and direct them to an effective knowledge of such operations. Many people have applied techniques, processes, methods, and algorithms to solve everyday problems throughout history. The Mathematics of that time had a more practical rather than a theoretical character, which came directly from the daily necessities. Approaching these ancestral techniques, we can call attention for and stimulate students for arithmetic operations, namely, the multiplication operation. In this presentation we present the way in which some people performed the multiplication operation, as well as the methods used for such: duplication in Ancient Egypt; “gelosia” and zigzag in medieval India; Napier's bones; multiplication with hands in the Renaissance; and the multiplication process of the Yoruba people. The use of several abacuses and of other materials of similar effect, such as the Napier rods, can be an excellent complement to the strategies for learning the multiplication operation. Keywords: multiplication operation; History of Mathematics