Generic Model for Adaptive Systems Realization

The permanent acquisition of the technical environment state and the ability to react to changes in this environment as well as to adapt to it are nowadays crucial for any information system. In this article, the authors present a well-defined model to guarantee in a simple way the design and the realization of adaptive information systems. This model is based on the Unified Modeling Language (UML) which is a widely known modeling standard. Its coverage is limited to bringing out the graded parties in the design of adaptive information systems. A future definition of a metamodel less related to UML language is therefore possible. The authors also present a code generator based on a model transformation technique. This generator allows you to partially produce domain-specific code as needed. A more complete code generator will come to ensure automatic generation of the code.

Generic Model for Adaptive Systems Realization

The permanent acquisition of the technical environment state and the ability to react to changes in this environment as well as to adapt to it are nowadays crucial for any information system. In this article, the authors present a well-defined model to guarantee in a simple way the design and the realization of adaptive information systems. This model is based on the Unified Modeling Language (UML) which is a widely known modeling standard. Its coverage is limited to bringing out the graded parties in the design of adaptive information systems. A future definition of a metamodel less related to UML language is therefore possible. The authors also present a code generator based on a model transformation technique. This generator allows you to partially produce domain-specific code as needed. A more complete code generator will come to ensure automatic generation of the code.

DSP Processer-in-the-Loop Tests Based on Automatic Code Generation

The digital signal processing (DSP) processor-in-the-loop tests based on automatic code generation technology are studied. Firstly, the idea of model-based design is introduced, and the principle and method of embedded code automatic generation technology are analyzed by taking the automatic code generation of the DSP control algorithm for pulse width modulation (PWM) output as an example. Then, the control system model is established on MATLAB/Simulink. After verifying the model through simulation, the target board platform is established with DSP as the core processor, and the automatically generated code is tested by the processor-in-the-loop (PIL). The results show that the technology greatly shortens the development cycle of the project, improves the robustness and consistency of the control code, and can be widely used in the complex algorithm development process of the controller, from intelligent design and modeling to implementation.

Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits

Approximate arithmetic circuits are an attractive alternative to accurate arithmetic circuits because they have significantly reduced delay, area, and power, albeit at the cost of some loss in accuracy. By keeping errors due to approximate computation within acceptable limits, approximate arithmetic circuits can be used for various practical applications such as digital signal processing, digital filtering, low power graphics processing, neuromorphic computing, hardware realization of neural networks for artificial intelligence and machine learning etc. The degree of approximation that can be incorporated into an approximate arithmetic circuit tends to vary depending on the error resiliency of the target application. Given this, the manual coding of approximate arithmetic circuits corresponding to different degrees of approximation in a hardware description language (HDL) may be a cumbersome and a time-consuming process—more so when the circuit is big. Therefore, a software tool that can automatically generate approximate arithmetic circuits of any size corresponding to a desired accuracy would not only aid the design flow but also help to improve a designer’s productivity by speeding up the circuit/system development. In this context, this paper presents ‘Approximator’, which is a software tool developed to automatically generate approximate arithmetic circuits based on a user’s specification. Approximator can automatically generate Verilog HDL codes of approximate adders and multipliers of any size based on the novel approximate arithmetic circuit architectures proposed by us. The Verilog HDL codes output by Approximator can be used for synthesis in an FPGA or ASIC (standard cell based) design environment. Additionally, the tool can perform error and accuracy analyses of approximate arithmetic circuits. The salient features of the tool are illustrated through some example screenshots captured during different stages of the tool use. Approximator has been made open-access on GitHub for the benefit of the research community, and the tool documentation is provided for the user’s reference.

Battery Energy Storage Participation in Automatic Generation Control of Island Systems, Coordinated with State of Charge Regulation

Efficient storage participation in the secondary frequency regulation of island systems is a prerequisite towards their complete decarbonization. However, energy reserve limitations of storage resources pose challenges to their integration in centralized automatic generation control (AGC). This paper presents a frequency control method, in which battery energy storage systems (BESSs) participate in automatic frequency restoration reserve (aFRR) provision, through their integration in the AGC of an island system. A local state of charge (SOC) controller ensures safe operation of the BESS in case of disturbances, without jeopardizing system security when available energy reserves are diminishing. The aFRR participation factors of regulating units are altered when the storage systems approach their SOC limits, re-allocating their reserves to other load-following units. Restoration of BESS energy reserves is achieved by integrating SOC regulation in the real-time economic dispatch of the system, formulated as a mixed-integer linear programming problem and solved every few minutes to determine the base points of the AGC units. A small autonomous power system, comprising conventional units, renewable energy sources and a BESS, is used as a study case to evaluate the performance of the proposed method, which is compared with alternative approaches to secondary regulation with BESS participation.

A LabVIEW Instrument Aimed for the Research on Brain-Computer Interface by Enabling the Acquisition, Processing, and the Neural Networks based Classification of the Raw EEG Signal Detected by the Embedded NeuroSky Biosensor

This paper proposes several LabVIEW applications to accomplish the data acquisition, processing, features extraction and real-time classification of the electroencephalographic (EEG) signal detected by the embedded sensor of the NeuroSky Mindwave Mobile headset. The LabVIEW applications are aimed at the implementation of a Brain-Computer Interface system, which is necessary to people with neuromotor disabilities. It is analyzed a novel approach regarding the preparation and automatic generation of the EEG dataset by identifying the most relevant multiple mixtures between selected EEG rhythms (both time and frequency domains of raw signal, delta, theta, alpha, beta, gamma) and extracted statistical features (mean, median, standard deviation, route mean square, Kurtosis coefficient and others). The acquired raw EEG signal is processed and segmented into temporal sequences corresponding to the detection of the multiple voluntary eye-blinks EEG patterns. The main LabVIEW application accomplished the optimal real-time artificial neural networks techniques for the classification of the EEG temporal sequences corresponding to the four states: 0 - No Eye-Blink Detected; 1 - One Eye-Blink Detected; 2 – Two Eye-Blinks Detected and 3 – Three Eye-Blinks Detected. Nevertheless, the application can be used to classify other EEG patterns corresponding to different cognitive tasks, since the whole functionality and working principle could estimate the labels associated with various classes.