High-performance FPGA implementation of the secure hash algorithm 3 for single and multi-message processing

<span>The secure hash function has become the default choice for information security, especially in applications that require data storing or manipulation. Consequently, optimized implementations of these functions in terms of Throughput or Area are in high demand. In this work we propose a new conception of the secure hash algorithm 3 (SHA-3), which aim to increase the performance of this function by using pipelining, four types of pipelining are proposed two, three, four, and six pipelining stages. This approach allows us to design data paths of SHA-3 with higher Throughput and higher clock frequencies. The design reaches a maximum Throughput of 102.98 Gbps on Virtex 5 and 115.124 Gbps on Virtex 6 in the case of the 6 stages, for 512 bits output length. Although the utilization of the resource increase with the increase of the number of the cores used in each one of the cases. The proposed designs are coded in very high-speed integrated circuits program (VHSIC) hardware description language (VHDL) and implemented in Xilinx Virtex-5 and Virtex-6 A field-programmable gate array (FPGA) devices and compared to existing FPGA implementations.</span>

Adaptive Deep Rider LSTM-enabled Objective Functions for RPL routing in IoT applications

This paper presents a proposed Objective Function (OF) design using various routing metrics for improving the performance of IoT applications. The most important idea of the proposed design is the selection of the routing metrics with respect to the application requirements. The various metrics, such as Energy, Distance, Delay, Link quality, Trust (EDDLT) are used for improving the objective function design of the RPL in various IoT applications. Here, the Adaptive Deep rider LSTM is newly employed for the energy prediction where the Adaptive Deep Rider LSTM is devised by the combination of the adaptive theory with the Rider Adam Algorithm (RAA), and the Deep-Long Short Memory (Deep-LSTM). However, the evaluation of the proposed method is carried out energy dissipation, throughput, and delay by achieving a minimum energy dissipation of 0.549, maximum throughput of 1, and a minimum delay of 0.191, respectively.

A Novel Approach for Securing Nodes using Two-Ray Model and Shadow Effects in Flying Ad-Hoc Network

In the last decades, flying ad-hoc networks (FANET) have provided unique features in the field of unmanned aerial vehicles (UAVs). This work intends to propose an efficient algorithm for secure load balancing in FANET. It is performed with the combination of the firefly algorithm and radio propagation model. To provide the optimal path and to improve the data communication of different nodes, two-ray and shadow fading models are used, which secured the multiple UAVs in some high-level applications. The performance analysis of the proposed efficient optimization technique is compared in terms of packet loss, throughput, end-to-end delay, and routing overhead. Simulation results showed that the secure firefly algorithm and radio propagation models demonstrated the least packet loss, maximum throughput, least delay, and least overhead compared with other existing techniques and models.

K-way Balanced Graph Partitioning for Parallel Computing

In modern computing, high-performance computing (HPC) and parallel computing require most of the decision-making in terms of distributing the payloads (input) uniformly across the available set of resources, majorly processors; the former deals with the hardware and its better utilization. In parallel computing, a larger, complex problem is broken down into multiple smaller calculations and executed simultaneously on several processors. The efficient use of resources (processors) plays a vital role in achieving the maximum throughput which necessitates uniform load distribution across available processors, i.e. load balancing. The load balancing in parallel computing is modeled as a graph partitioning problem. In the graph partitioning problem, the weighted nodes represent the computing cost at each node, and the weighted edges represent the communication cost between the connected nodes. The goal is to partition the graph G into k partitions such that: I) the sum of weights on the nodes is approximately equal for each partition, and, II) the sum of weights on the edges across different partitions is minimum. In this paper, a novel node-weighted and edge-weighted k-way balanced graph partitioning (NWEWBGP) algorithm of O(n x n) is proposed. The algorithm works for all relevant values of k, meets or improves on earlier algorithms in terms of balanced partitioning and lowest edge-cut. For evaluation and validation, the outcome is compared with the ground truth benchmarks.

A High Granularity Approach to NetworkPacket Processing for Latency-TolerantApplications with CUDA (Corvyd)

Currently, practical network packet processing used for In-trusion Detection Systems/Intrusion Prevention Systems (IDS/IPS) tendto belong to one of two disjoint categories: software-only implementa-tions running on general-purpose CPUs, or highly specialized networkhardware implementations using ASICs or FPGAs for the most commonfunctions, general-purpose CPUs for the rest. These approaches cover tryto maximize the performance and minimize the cost, but neither system,when implemented effectively, is affordable to any clients except for thoseat the well-funded enterprise level. In this paper, we aim to improve theperformance of affordable network packet processing in heterogeneoussystems with consumer Graphics Processing Units (GPUs) hardware byoptimizing latency-tolerant packet processing operations, notably IDS,to obtain maximum throughput required by such systems in networkssophisticated enough to demand a dedicated IDS/IPS system, but notenough to justify the high cost of cutting-edge specialized hardware. Inparticular, this project investigated increasing the granularity of OSIlayer-based packet batching over that of previous batching approaches.We demonstrate that highly granular GPU-enabled packet processing isgenerally impractical, compared with existing methods, by implementingour own solution that we call Corvyd, a heterogeneous real-time packetprocessing engine.

Effects of Novel Material Field Effect Transistor for Heterogeneous Energy and Traffic-Aware Secure Applications

The advent of the automated technological revolution has enabled the Internet of Things to rejuvenate, revolutionize, and redeem the services of sensors. The recent development of microsensor devices is distributed in a real-world terrestrial environment to sense various environmental changes. The energy consumption of the remotely deployed microsystems depends on its utilization efficiency. Improper utilization of sensor nodes’ heterogeneity could lead to uneven energy consumption and load imbalance across the network, which will degrade the performance of the network. The proposed heterogeneous energy and traffic aware (HETA) considers the key parameters such as delay, throughput, traffic load, energy consumption, and life span. The residual energy and a minimum distance between the base station and cluster members are taken into consideration for the cluster head selection. The probability of hitting data traffic has been utilized to analyse energy and traffic towards the base station. The role of the sensor node has been realized and priority-based data forwarding are also proposed. As a result, the heterogeneous energy and traffic aware perform well in balancing traffic towards the base station, which is analysed in terms of maximum throughput and increase in a lifetime of heterogeneous energy networks more than 5000 rounds, and the algorithm outperforms 34.5% of nodes are alive with transmissible energy. The proposed research also endorses unequal clustering and minimum energy consumption. We have modeled our proposed research using various p-type junctionless nanowire FET without doping injunctions. The materials used in this analysis were silicon (Si), germanium (Ge), indium phosphide (InP), gallium arsenide (GaAs), and Al(x)Ga(1−x)As. The dimensions of the p-type cylindrical nanowire channel were 25 nm long and 10 nm in diameter.

Multi Duty Cycle Scheduled Routing in Wireless Sensor Network-lifetime Maximization

Cluster-based protocols are best for applications that require reliability and a continuous functioning environment with a sustainable lifetime of WSN. The dynamic nature of the sensor node makes energy conservation a challenging issue. Sensor node scheduled based on sensing error for energy conservation compromise the accuracy of prediction. The high data accuracy achieved using a single duty cycle controller at each node with compromised throughput and increased routing overhead. Duty Cycle Controller managing a great number of control messages at the network level leads to control packet interference with data packet transmission, increasing packet drop and minimizing throughput. Also, the single-duty cycle controller at the network level leads to increased control overhead. The proposed multilevel cluster-based approach focuses on the appropriate cluster design, selection of cluster head, and sensor nodes scheduling based on sensing error. The proposed method applies a multi-duty cycle controller at each cluster level, and control messages handled are related to nodes in a cluster. Thus has less interference and packet drop leading to maximum throughput than existing methods. The simulation results demonstrated that the proposed method with sensor nodes scheduled at individual cluster levels using a multi-duty cycle controller exhibited improved network lifetime, throughput, and reduced energy consumption compared with the state-of-the-art techniques.

Survey of IoT for Developing Countries: Performance Analysis of LoRaWAN and Cellular NB-IoT Networks

Recently, Internet of Things (IoT) deployments have shown their potential for aiding the realisation of the Sustainable Development Goals (SDGs). Concerns regarding how the IoT can specifically drive SDGs 6, 11 and 9 in developing countries have been raised with respect to the challenges of deploying licensed and unlicensed low-power wide area network (LPWAN) IoT technologies and their opportunities for IoT consumers and service providers. With IoT infrastructure and protocols being ubiquitous and each being proposed for different SDGs, we review and compare the various performance characteristics of LoRaWAN and NB-IoT networks. From the performance analysis of our networks, NB-IoT, one of the standardised promising cellular IoT solutions for developing countries, is more expensive and less energy-efficient than LoRaWAN. Utilising the same user equipment (UE), NB-IoT consumed an excess of 2 mAh of power for joining the network and 1.7 mAh more for a 44-byte uplink message compared to LoRaWAN. However, NB-IoT has the advantage of reliably and securely delivering higher network connection capacity in IoT use cases, leveraging existing cellular infrastructure. With a maximum throughput of 264 bps at 837 ms measured latency, NB-IoT outperformed LoRaWAN and proved robust for machine-type communications. These findings will help IoT consumers and service providers understand the performance differences and deployment challenges of NB-IoT and LoRaWAN and establish new research directions to tackle IoT issues in developing countries. With Nigeria as a case study, for consumers and organisations at a crossroads in their long-term deployment decisions, the proposed LPWAN integrated architecture is an example of the deployment opportunities for consumer and industrial IoT applications in developing countries.