Residual Noise Identification for PIM Measurement Systems using Variable Low-PIM Termination

<p>In this letter, we describe the design for the variable low-PIM termination composed of the voltage-controlled IM-source, a fixed attenuator, and a linear attenuator.</p> <p>The design method for evaluating PIM-level of the fixed attenuator is presented in order not to limit the variable range of entire termination.</p> <p>It is possible to maintain low-PIM performance in spite of using active voltage-controlled IM-source, whose IM level is extremely high. </p> <p>This termination is used for a dynamic residual noise identification for PIM measurement systems by observing the saturation value for voltage sweep.</p> <p>The validity is confirmed by experiments in 2GHz band.</p>

Residual Noise Identification for PIM Measurement Systems using Variable Low-PIM Termination

<p>In this letter, we describe the design for the variable low-PIM termination composed of the voltage-controlled IM-source, a fixed attenuator, and a linear attenuator.</p> <p>The design method for evaluating PIM-level of the fixed attenuator is presented in order not to limit the variable range of entire termination.</p> <p>It is possible to maintain low-PIM performance in spite of using active voltage-controlled IM-source, whose IM level is extremely high. </p> <p>This termination is used for a dynamic residual noise identification for PIM measurement systems by observing the saturation value for voltage sweep.</p> <p>The validity is confirmed by experiments in 2GHz band.</p>

Anomalous change of carrier transport property of ferroelectric Hf0.5Zr0.5O2 thin films in the first poling treatment

Carrier transport properties of ferroelectric Hf0.5Zr0.5O2 (HZO) thin films have been investigated on metal-ferroelectric-metal (MFM) capacitor in the first current flow of ferroelectric poling treatment. In current–voltage (I–V) measurement of MFM capacitor, a kink or discontinuity point of derivative in I–V characteristic appears, and after the cyclic voltage sweep this kink disappears. This phenomenon is different from the ferroelectric instabilities after several thousand or million voltage cycle applies reported as the wake-up and fatigue. From the analysis using Poole-Frenkel plot of I–V characteristics, it is suggested that irreversible trap generation by electric field apply occurs in poling treatment.

Anodizing of Hydrogenated Titanium and Zirconium Films

Magnetron-sputtered thin films of titanium and zirconium, with a thickness of 150 nm, were hydrogenated at atmospheric pressure and a temperature of 703 K, then anodized in boric, oxalic, and tartaric acid aqueous solutions, in potentiostatic, galvanostatic, potentiodynamic, and combined modes. A study of the thickness distribution of the elements in fully anodized hydrogenated zirconium samples, using Auger electron spectroscopy, indicates the formation of zirconia. The voltage- and current-time responses of hydrogenated titanium anodizing were investigated. In this work, fundamental possibility and some process features of anodizing hydrogenated metals were demonstrated. In the case of potentiodynamic anodizing at 0.6 M tartaric acid, the increase in titanium hydrogenation time, from 30 to 90 min, leads to a decrease in the charge of the oxidizing hydrogenated metal at an anodic voltage sweep rate of 0.2 V·s−1. An anodic voltage sweep rate in the range of 0.05–0.5 V·s−1, with a hydrogenation time of 60 min, increases the anodizing efficiency (charge reduction for the complete oxidation of the hydrogenated metal). The detected radical differences in the time responses and decreased efficiency of the anodic process during the anodizing of the hydrogenated thin films, compared to pure metals, are explained by the presence of hydrogen in the composition of the samples and the increased contribution of side processes, due to the possible features of the formed oxide morphologies.

Simultaneous Interface Defect Density and Differential Capacitance Imaging by Time-Resolved Scanning Nonlinear Dielectric Microscopy

We investigate non-uniformity at SiO2/SiC interfaces by time-resolved scanning nonlinear dielectric microscopy, which permits the simultaneous nanoscale imaging of interface defect density (Dit) and differential capacitance (dC/dV) at insulator-semiconductor interfaces. Here we perform the cross correlation analysis of the images with spatially non-uniform clustering distributions reported previously. We show that Dit images are not correlated with the simultaneous dC/dV images significantly but with the difference image between the two dC/dV images taken with different voltage sweep directions. The results indicate that the dC/dV images visualize the non-uniformity of the total interface charge density and the difference images reflect that of Dit at a particular energy range.

Admittance of mis-structures based on pentacene with two-layer dielectric SiO2-Al2O3

Experimental studies of the admittance of MIS structures based on pentacene with a two-layer dielectric SiO2-Al2O3 and various materials for backward contact (Au, Al, In, Ag) have been carried out in a wide range of frequencies, temperatures, and biases. The concentration of holes in the organic film of pentacene, found from the capacitance-voltage characteristics, took rather high values (in the range (4-40)×1017 cm-3). The magnitude of the hysteresis of the electrophysical characteristics turned out to be minimal for structures with Ag and In reverse contacts. Significant hysteresis was found for structures with reverse contacts made of Au and Al at 300 K. For a structure with a reverse contact made of Al, with a forward voltage sweep in a weak accumulation mode, a maximum capacitance was observed, which can be associated with a recharge of the level of surface states at the interface between the inorganic insulator and pentacene. An equivalent circuit of a pentacene-based MIS structure is proposed, which allows one to calculate the frequency dependences of the impedance under various conditions. The values of the elements of the equivalent circuit are found at various biases and temperatures. For structures with backward contacts made of Au and Ag, maxima on the temperature dependence of the conductance associated with the recharge of bulk traps in the organic pentacene film were found.

How to speed up ion transport in nanopores

Electrolyte-filled subnanometre pores exhibit exciting physics and play an increasingly important role in science and technology. In supercapacitors, for instance, ultranarrow pores provide excellent capacitive characteristics. However, ions experience difficulties in entering and leaving such pores, which slows down charging and discharging processes. In an earlier work we showed for a simple model that a slow voltage sweep charges ultranarrow pores quicker than an abrupt voltage step. A slowly applied voltage avoids ionic clogging and co-ion trapping—a problem known to occur when the applied potential is varied too quickly—causing sluggish dynamics. Herein, we verify this finding experimentally. Guided by theoretical considerations, we also develop a non-linear voltage sweep and demonstrate, with molecular dynamics simulations, that it can charge a nanopore even faster than the corresponding optimized linear sweep. For discharging we find, with simulations and in experiments, that if we reverse the applied potential and then sweep it to zero, the pores lose their charge much quicker than they do for a short-circuited discharge over their internal resistance. Our findings open up opportunities to greatly accelerate charging and discharging of subnanometre pores without compromising the capacitive characteristics, improving their importance for energy storage, capacitive deionization, and electrochemical heat harvesting.

Voltage Amplitude-Controlled Synaptic Plasticity from Complementary Resistive Switching in Alloying HfOx with AlOx-Based RRAM

In this work, the synaptic plasticity from complementary resistive switching in a HfAlOx-based resistive memory device was emulated by a direct current (DC) voltage sweep, current sweep, and pulse transient. The alloyed HfAlOx dielectric was confirmed by X-ray photoelectron spectroscopy analysis. The negative differential resistance observed before the forming and set processes can be used for interface resistive switching with a low current level. Complementary resistive switching is obtained after the forming process at a negative bias. This unique resistive switching is also suitable for synaptic device applications in which the reset process occurs after an additional set process. The current sweep mode provides more clear information on the complementary resistive switching. Multiple current states are achieved by controlling the amplitude of the set and reset voltages under DC sweep mode. The potentiation and depression characteristics are mimicked by varying the pulse voltage amplitude for synaptic device application in a neuromorphic system. Finally, we demonstrate spike-timing-dependent plasticity by tuning the timing differences between pre-spikes and post-spikes.

Effects of Charge Trapping at the MoS2–SiO2 Interface on the Stability of Subthreshold Swing of MoS2 Field Effect Transistors

The stability of the subthreshold swing (SS) is quite important for switch and memory applications in logic circuits. The SS in our MoS2 field effect transistor (FET) is enlarged when the gate voltage sweep range expands towards the negative direction. This is quite different from other reported MoS2 FETs whose SS is almost constant while varying gate voltage sweep range. This anomalous SS enlargement can be attributed to interface states at the MoS2–SiO2 interface. Moreover, a deviation of SS from its linear relationship with temperature is found. We relate this deviation to two main reasons, the energetic distribution of interface states and Fermi level shift originated from the thermal activation. Our study may be helpful for the future modification of the MoS2 FET that is applied in the low power consumption devices and circuits.

Understanding of Polarization-Induced Threshold Voltage Shift in Ferroelectric-Gated Field Effect Transistor for Neuromorphic Applications

A ferroelectric-gated fin-shaped field effect transistor (Fe-FinFET) is fabricated by connecting a Pb(Zr0.2Ti0.8)O3-based ferroelectric capacitor into the gate electrode of FinFET. The ferroelectric capacitor shows coercive voltages of approximately −1.5 V and 2.25 V. The polarization-induced threshold voltage shift in the Fe-FinFET is investigated by regulating the gate voltage sweep range. When the maximum positive gate to source voltage is varied from 4 V to 2 V with a fixed starting negative gate to source voltage, the threshold voltage during the backward sweep is increased from approximately −0.60 V to 1.04 V. In the case of starting negative gate to source voltage variation from −4 V to −0.5 V with a fixed maximum positive gate to source voltage of 4 V, the threshold voltage during the forward sweep is decreased from 1.66 V to 0.87 V. Those results can be elucidated with polarization domain states. Lastly, it is observed that the threshold voltage is mostly increased/decreased when the positive/negative gate voltage sweep range is smaller/larger than the positive/negative coercive voltage, respectively.