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Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCs
System Level Design from HW/SW to Memory for Embedded Systems - IFIP Advances in Information and Communication Technology
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10.1007/978-3-319-90023-0_10
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2017
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pp. 116-127
Author(s):
Andrés Goens
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Jeronimo Castrillon
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