An Extracting and Labeling Algorithm for Connected Components in Images

Author(s):  
Zhongsheng Li ◽  
Shuang Lou
Author(s):  
LIFENG HE ◽  
YUYAN CHAO ◽  
KENJI SUZUKI

This paper presents a run- and label-equivalence-based one-and-a-half-scan algorithm for labeling connected components in a binary image. Major differences between our algorithm and conventional label-equivalence-based algorithms are: (1) all conventional label-equivalence-based algorithms scan all pixels in the given image at least twice, whereas our algorithm scans background pixels once and object pixels twice; (2) all conventional label-equivalence-based algorithms assign a provisional label to each object pixel in the first scan and relabel the pixel in the later scan(s), whereas our algorithm assigns a provisional label to each run in the first scan, and after resolving label equivalences between runs, by using the recorded run data, it assigns each object pixel a final label directly. That is, in our algorithm, relabeling of object pixels is not necessary any more. Experimental results demonstrated that our algorithm is highly efficient on images with many long runs and/or a small number of object pixels. Moreover, our algorithm is directly applicable to run-length-encoded images, and we can obtain contours of connected components efficiently.


2010 ◽  
Vol 21 (03) ◽  
pp. 405-425 ◽  
Author(s):  
YASUAKI ITO ◽  
KOJI NAKANO

Connected component labeling is a process that assigns unique labels to the connected components of a binary image. The main contribution of this paper is to present a low-latency hardware connected component labeling algorithm for k-concave binary images designed and implemented in FPGA. Pixels of a binary image are given to the FPGA in raster order, and the resulting labels are also output in the same order. The advantage of our labeling algorithm is low latency and to use a small internal storage of the FPGA. We have implemented our hardware labeling algorithm in an Altera Stratix Family FPGA, and evaluated the performance. The implementation result shows that for a 10-concave binary image of 2048 × 2048, our connected component labeling algorithm runs in approximately 70ms and its latency is approximately 750µs.


2019 ◽  
Vol 91 ◽  
pp. 281-290 ◽  
Author(s):  
Danyang Zhang ◽  
Huadong Ma ◽  
Linqiang Pan

Author(s):  
BILAL BATAINEH

Connected-component labeling is an important process in image analysis and pattern recognition. It aims to deduct the connected components by giving a unique label value for each individual component. Many algorithms have been proposed, but they still face several problems such as slow execution time, falling in the pipeline, requiring a huge amount of memory with high resolution, being noisy, and giving irregular images. In this work, a fast and memory- efficient connected-component labeling algorithm for binary images is proposed. The proposed algorithm is based on a new run-base tracing method with a new resolving process to find the final equivalent label values. A set of experiments were conducted on different types of binary images. The proposed algorithm showed high performance compared to the other algorithms.


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