Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs
2001 ◽
Vol 13
(8-9)
◽
pp. 663-680
◽
2014 ◽
Vol 5
(2)
◽
pp. 84
2000 ◽
Vol 54
(3)
◽
pp. 259-271
◽
1993 ◽
Vol 4
(7)
◽
pp. 812-826
◽