Hardware Architecture Exploration of IEEE 802.11n Receiver Using SystemC Transaction Level Modeling

The 9th International Conference on Advanced Communication Technology ◽

10.1109/icact.2007.358699 ◽

2007 ◽

Author(s):

Jin Lee ◽

Sin-Chong Park

Keyword(s):

Hardware Architecture ◽

Ieee 802.11N ◽

Transaction Level Modeling ◽

Architecture Exploration ◽

Transaction Level

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Transaction Level Modeling for Hardware Architecture Exploration with IEEE 802.11n Receiver Example

2006 International Conference on Communication Technology ◽

10.1109/icct.2006.341869 ◽

2006 ◽

Author(s):

Jin Lee ◽

Sin-Chong Park

Keyword(s):

Hardware Architecture ◽

Ieee 802.11N ◽

Transaction Level Modeling ◽

Architecture Exploration ◽

Transaction Level

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Extending the transaction level modeling approach for fast communication architecture exploration

Proceedings of the 41st annual conference on Design automation - DAC '04 ◽

10.1145/996566.996603 ◽

2004 ◽

Author(s):

Sudeep Pasricha ◽

Nikil Dutt ◽

Mohamed Ben-Romdhane

Keyword(s):

Transaction Level Modeling ◽

Communication Architecture ◽

Modeling Approach ◽

Architecture Exploration ◽

Transaction Level

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Case Study on Transaction Level Modeling of NoC based IEEE 802.11n

2006 Asia-Pacific Conference on Communications ◽

10.1109/apcc.2006.255848 ◽

2006 ◽

Author(s):

Sung-rok Yoon ◽

Sin-chong Park

Keyword(s):

Ieee 802.11N ◽

Transaction Level Modeling ◽

Transaction Level

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Accelerating multi-party scheduling for transaction-level modeling

Proceedings of the 19th ACM Great Lakes symposium on VLSI - GLSVLSI '09 ◽

10.1145/1531542.1531619 ◽

2009 ◽

Author(s):

Di Wang ◽

Vyas Venkataraman ◽

Zhen Wang ◽

Wei Qin ◽

Hangsheng Wang ◽

...

Keyword(s):

Transaction Level Modeling ◽

Transaction Level

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A Transaction Level Modeling of Network-on-Chip Architecture for Energy Estimation

2007 IEEE International Conference on Research, Innovation and Vision for the Future ◽

10.1109/rivf.2007.369136 ◽

2007 ◽

Author(s):

Anh-Vu Dinh-Duc ◽

Pascal Vivet ◽

Alain Clouard

Keyword(s):

Network On Chip ◽

Energy Estimation ◽

Transaction Level Modeling ◽

Transaction Level ◽

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Transaction Level Modeling for Early Verification on Embedded System Design

2009 Eighth IEEE/ACIS International Conference on Computer and Information Science ◽

10.1109/icis.2009.41 ◽

2009 ◽

Author(s):

Maman Abdurohman ◽

Kuspriyanto K. ◽

Sarwono Sutikno ◽

Arif Sasongko

Keyword(s):

Embedded System ◽

System Design ◽

Embedded System Design ◽

Transaction Level Modeling ◽

Transaction Level

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Hardware Architecture Exploration for Deep Neural Networks

Arabian Journal for Science and Engineering ◽

10.1007/s13369-021-05455-4 ◽

2021 ◽

Author(s):

Wenqi Zheng ◽

Yangyi Zhao ◽

Yunfan Chen ◽

Jinhong Park ◽

Hyunchul Shin

Keyword(s):

Neural Networks ◽

Deep Neural Networks ◽

Hardware Architecture ◽

Architecture Exploration

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Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems

Design Automation for Embedded Systems ◽

10.1007/s10617-006-9586-7 ◽

2005 ◽

Vol 10 (2-3) ◽

pp. 105-125 ◽

Author(s):

Nagu Dhanwada ◽

Reinaldo A. Bergamaschi ◽

William W. Dungan ◽

Indira Nair ◽

Paul Gramann ◽

...

Keyword(s):

Power Analysis ◽

Transaction Level Modeling ◽

Transaction Level

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SystemC Transaction Level Modeling and Verification of IEEE 802.15.3 MAC

2006 International Conference on Communications, Circuits and Systems ◽

10.1109/icccas.2006.285195 ◽

2006 ◽

Author(s):

Yu Wei ◽

He Guanghui ◽

Xu Ningyi ◽

Zhou Zucheng

Keyword(s):

Transaction Level Modeling ◽

Ieee 802.15.3 ◽

Transaction Level

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Transaction level modeling

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016742 ◽

2004 ◽

Author(s):

Adam Donlin

Keyword(s):

Transaction Level Modeling ◽

Transaction Level

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