Smart-Redundancy: an Alternative SEU/SET Mitigation Method for FPGAs

2021 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas51556.2021.9401092 ◽

2021 ◽

Author(s):

Aurelien Alacchi ◽

Edouard Giacomin ◽

Xifan Tang ◽

Pierre-Emmanuel Gaillardon

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