Multicasting based topology generation and core mapping for a power efficient networks-on-chip

2007 ◽  
Author(s):  
Balasubramanian Sethuraman ◽  
Ranga Vemuri
Keyword(s):  
Networks On Chip ◽  
Power Efficient ◽  
Topology Generation ◽  
On Chip ◽  
Core Mapping

A fault‐tolerant core mapping technique in networks‐on‐chip

2013 ◽  
Vol 7 (6) ◽  
pp. 238-245 ◽  
Author(s):  
Fatemeh Khalili ◽  
Hamid R. Zarandi
Keyword(s):  
Fault Tolerant ◽  
Mapping Technique ◽  
Networks On Chip ◽  
On Chip ◽  
Core Mapping

Power-efficient deterministic and adaptive routing in torus networks-on-chip

2012 ◽  
Vol 36 (7) ◽  
pp. 571-585 ◽  
Author(s):  
Dara Rahmati ◽  
Hamid Sarbazi-Azad ◽  
Shaahin Hessabi ◽  
Abbas Eslami Kiasari
Keyword(s):  
Adaptive Routing ◽  
Networks On Chip ◽  
Power Efficient ◽  
On Chip ◽  
Torus Networks

Optimization Approaches for Core Mapping on Networks on Chip

2017 ◽  
Vol 64 (3) ◽  
pp. 394-405 ◽  
Author(s):  
Mehdi Taassori ◽  
Sadegh Niroomand ◽  
Sener Uysal ◽  
Bela Vizvari ◽  
Abdollah Hadi-Vencheh
Keyword(s):  
Networks On Chip ◽  
On Chip ◽  
Core Mapping

A novel power efficient adaptive RED-based flow control mechanism for networks-on-chip

2016 ◽  
Vol 51 ◽  
pp. 121-138 ◽  
Author(s):  
R. Akbar ◽  
F. Safaei ◽  
S. M. Seyyed Modallalkar
Keyword(s):  
Flow Control ◽  
Control Mechanism ◽  
Networks On Chip ◽  
Power Efficient ◽  
On Chip

Networks-on-Chip topology generation techniques: Area and delay evaluation

2008 ◽  
Author(s):  
Ahmed A. Morgan ◽  
Haytham Elmiligi ◽  
M. Watheq El-Kharashi ◽  
Fayez Gebali
Keyword(s):  
Networks On Chip ◽  
Topology Generation ◽  
On Chip
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