Modeling a Cache Coherence Protocol with the Guarded Action Language

Electronic Proceedings in Theoretical Computer Science ◽

10.4204/eptcs.268.3 ◽

2018 ◽

Vol 268 ◽

pp. 88-103

Author(s):

Quentin L. Meunier ◽

Yann Thierry-Mieg ◽

Emmanuelle Encrenaz

Keyword(s):

Cache Coherence ◽

Action Language ◽

Cache Coherence Protocol

Hybrid Cache Coherence Protocol for Multi-Core Processor Architecture

International Journal of Computer Applications ◽

10.5120/12031-8060 ◽

2013 ◽

Vol 70 (14) ◽

pp. 24-29 ◽

Cited By ~ 1

Author(s):

Muthukumar. S ◽

Dhinakaran. K

Keyword(s):

Cache Coherence ◽

Processor Architecture ◽

Cache Coherence Protocol ◽

Hybrid Cache ◽

Multi Core Processor

An efficient hybrid cache coherence protocol for shared memory multiprocessors

Proceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing ◽

10.1109/icpp.1996.537158 ◽

2002 ◽

Author(s):

Yeimkuan Chang ◽

L.N. Bhuyan

Keyword(s):

Shared Memory ◽

Cache Coherence ◽

Shared Memory Multiprocessors ◽

Cache Coherence Protocol ◽

Hybrid Cache

Hardware Cache Coherence Protocol

International Journal of Computers and Applications ◽

10.2316/journal.202.2004.4.204-0515 ◽

2004 ◽

Vol 26 (4) ◽

Author(s):

M. Daoui ◽

M. Lalam ◽

B. Djamah ◽

A. Bilami

Keyword(s):

Cache Coherence ◽

Cache Coherence Protocol

Design of directory based cache coherence protocol verification logic in CMPs around TACA

2013 International Conference on High Performance Computing & Simulation (HPCS) ◽

10.1109/hpcsim.2013.6641433 ◽

2013 ◽

Author(s):

Mamata Dalui ◽

Biplab K Sikdar

Keyword(s):

Cache Coherence ◽

Protocol Verification ◽

Cache Coherence Protocol

A novel directory based hybrid cache coherence protocol for shared memory multiprocessors

2016 IEEE International Symposium on Phased Array Systems and Technology (PAST) ◽

10.1109/array.2016.7832588 ◽

2016 ◽

Cited By ~ 1

Author(s):

Abu Asaduzzaman ◽

Kishore K. Chidella

Keyword(s):

Shared Memory ◽

Cache Coherence ◽

Shared Memory Multiprocessors ◽

Cache Coherence Protocol ◽

Hybrid Cache

A correctness proof of a cache coherence protocol

Proceedings of 11th Annual Conference on Computer Assurance COMPASS 96 CMPASS-96 ◽

10.1109/cmpass.1996.507881 ◽

2002 ◽

Cited By ~ 4

Author(s):

A. Felty ◽

F. Stomp

Keyword(s):

Cache Coherence ◽

Correctness Proof ◽

Cache Coherence Protocol

Self-adaptive WWW cache coherence protocol (SATTL)

2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099) ◽

10.1109/melcon.2000.880421 ◽

2002 ◽

Author(s):

V. Sruk ◽

S. Srbljic ◽

L. Budin

Keyword(s):

Cache Coherence ◽

Cache Coherence Protocol ◽

Self Adaptive

Cache coherence protocol for home proxy cache on RHiNET and its preliminary performance estimation

2001 Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.2001.955197 ◽

2001 ◽

Cited By ~ 2

Author(s):

Nakajo ◽

Ishii ◽

Yamamoto ◽

Kudo ◽

Yokoyama ◽

...

Keyword(s):

Cache Coherence ◽

Performance Estimation ◽

Proxy Cache ◽

Cache Coherence Protocol

Relaxing cache coherence protocol with QOLB synchronizations

Proceedings High Performance Computing on the Information Superhighway. HPC Asia '97 ◽

10.1109/hpc.1997.592112 ◽

2002 ◽

Author(s):

Jae Bum Lee ◽

Chu Shik Jhon

Keyword(s):

Cache Coherence ◽

Cache Coherence Protocol

Implementation of cache coherence protocol for COMA multiprocessor systems based on the scalable coherent interface

Computer Standards & Interfaces ◽

10.1016/j.csi.2004.03.010 ◽

2004 ◽

Vol 27 (1) ◽

pp. 71-88

Author(s):

M. AL-Rousan ◽

S. Ahmed

Keyword(s):

Cache Coherence ◽

Multiprocessor Systems ◽

Coherent Interface ◽

Cache Coherence Protocol ◽

Scalable Coherent Interface