2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
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9781538640371

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TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.57 ◽

2017 ◽

Cited By ~ 4

Author(s):

Ganghee Lee ◽

Dimitris Agiakatsikas ◽

Tong Wu ◽

Ediz Cetin ◽

Oliver Diessel

Keyword(s):

Code Generation

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A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.41 ◽

2017 ◽

Author(s):

Yohann Uguen ◽

Florent de Dinechin ◽

Steven Derrien

Keyword(s):

High Level Synthesis ◽

Floating Point ◽

High Level ◽

Synthesis Approach

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K-Mer Counting Using Bloom Filters with an FPGA-Attached HMC

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.23 ◽

2017 ◽

Cited By ~ 9

Author(s):

Nathaniel Mcvicar ◽

Chih-Ching Lin ◽

Scott Hauck

Keyword(s):

Bloom Filters

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An FPGA Design Framework for CNN Sparsification and Acceleration

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.21 ◽

2017 ◽

Cited By ~ 6

Author(s):

Sicheng Li ◽

Wei Wen ◽

Yu Wang ◽

Song Han ◽

Yiran Chen ◽

...

Keyword(s):

Design Framework ◽

Fpga Design

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A Real-Time Embedded FPGA Processor for a Stand-Alone Dual-Mode Assistive Device

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.55 ◽

2017 ◽

Cited By ~ 1

Author(s):

Ali Jafari ◽

Maysam Ghovanloo ◽

Tinoosh Mohsenin

Keyword(s):

Real Time ◽

Assistive Device ◽

Dual Mode

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Improving the Accuracy of Arctan for Face Detection

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.48 ◽

2017 ◽

Cited By ~ 2

Author(s):

Youngsoo Kim ◽

Hossein Shahdoost ◽

Shrikant Jadhav ◽

Clay S. Gloster

Keyword(s):

Face Detection

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Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.18 ◽

2017 ◽

Author(s):

Minghua Shen ◽

Guojie Luo

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Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.29 ◽

2017 ◽

Author(s):

Jeffrey Goeders

Keyword(s):

Storage Devices

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A Network-on-Chip Based H.264 Video Decoder Prototype Implemented on FPGAs

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.10 ◽

2017 ◽

Cited By ~ 1

Author(s):

Ian J. Barge ◽

Cristinel Ababei

Keyword(s):

Network On Chip ◽

Video Decoder ◽

On Chip

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The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) ◽

10.1109/fccm.2017.36 ◽

2017 ◽

Cited By ~ 3

Author(s):

John Mawer ◽

Oscar Palomar ◽

Cosmin Gorgovan ◽

Andy Nisbet ◽

Will Toms ◽

...

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2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS

A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators

K-Mer Counting Using Bloom Filters with an FPGA-Attached HMC

An FPGA Design Framework for CNN Sparsification and Acceleration

A Real-Time Embedded FPGA Processor for a Stand-Alone Dual-Mode Assistive Device

Improving the Accuracy of Arctan for Face Detection

Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning

Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices

A Network-on-Chip Based H.264 Video Decoder Prototype Implemented on FPGAs

The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
Latest Publications