Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems
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Published By Springer US

9781461369981, 9781461544371

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

System Synthesis Methodology

Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems ◽

10.1007/978-1-4615-4437-1_5 ◽

2000 ◽

pp. 289-382

Author(s):

Filip Thoen ◽

Francky Catthoor

Keyword(s):

System Synthesis ◽

Synthesis Methodology

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Timing Analysis

Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems ◽

10.1007/978-1-4615-4437-1_4 ◽

2000 ◽

pp. 173-287

Author(s):

Filip Thoen ◽

Francky Catthoor

Keyword(s):

Timing Analysis

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Introduction

Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems ◽

10.1007/978-1-4615-4437-1_1 ◽

2000 ◽

pp. 1-39 ◽

Author(s):

Filip Thoen ◽

Francky Catthoor

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Conclusions

Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems ◽

10.1007/978-1-4615-4437-1_6 ◽

2000 ◽

pp. 383-391

Author(s):

Filip Thoen ◽

Francky Catthoor

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System Representation Model

Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems ◽

10.1007/978-1-4615-4437-1_3 ◽

2000 ◽

pp. 79-171

Author(s):

Filip Thoen ◽

Francky Catthoor

Keyword(s):

Representation Model ◽

System Representation

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Related Work and Contemporary Approaches

Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems ◽

10.1007/978-1-4615-4437-1_2 ◽

2000 ◽

pp. 41-77

Author(s):

Filip Thoen ◽

Francky Catthoor

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