VLSI for Artificial Intelligence and Neural Networks
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Published By Springer US

9781461366713, 9781461537526

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Incremental Garbage Collection Scheme in KL1 and Its Architectural Support of PIM

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_4 ◽

1991 ◽

pp. 33-45

Author(s):

Yasunori Kimura ◽

Takashi Chikayama ◽

Tsuyoshi Shinogi ◽

Atsuhiro Goto

Keyword(s):

Garbage Collection ◽

Architectural Support

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A VLSI Implementation of a Generic Systolic Synaptic Building Block for Neural Networks

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_32 ◽

1991 ◽

pp. 325-334 ◽

Cited By ~ 14

Author(s):

Christian Lehmann ◽

François Blayo

Keyword(s):

Neural Networks ◽

Building Block ◽

Vlsi Implementation

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Binary Neural Network with Delayed Synapses

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_29 ◽

1991 ◽

pp. 295-304 ◽

Cited By ~ 2

Author(s):

Tadashi Ae ◽

Yasuhiro Mitsui ◽

Satoshi Fujita ◽

Reiji Aibara

Keyword(s):

Neural Network ◽

Binary Neural Network

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A Cascadable VLSI Architecture for the Realization of Large Binary Associative Networks

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_26 ◽

1991 ◽

pp. 265-274 ◽

Cited By ~ 4

Author(s):

Werner Poechmueller ◽

Manfred Glesner

Keyword(s):

Vlsi Architecture ◽

Associative Networks

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The VLSI Implementation of the ∑ Architecture

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_25 ◽

1991 ◽

pp. 255-263

Author(s):

S. R. Williams ◽

J. G. Cleary

Keyword(s):

Vlsi Implementation

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Architectural Design of the Rewrite Rule Machine Ensemble

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_2 ◽

1991 ◽

pp. 11-22 ◽

Cited By ~ 7

Author(s):

Hitoshi Aida ◽

Sany Leinwand ◽

José Meseguer

Keyword(s):

Architectural Design

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SIMD Parallelism for Symbol Mapping

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_7 ◽

1991 ◽

pp. 67-78 ◽

Cited By ~ 3

Author(s):

Chang Jun Wang ◽

Simon H. Lavington

Keyword(s):

Symbol Mapping ◽

Simd Parallelism

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A Delay-Insensitive Neural Network Engine

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_36 ◽

1991 ◽

pp. 367-376 ◽

Cited By ~ 3

Author(s):

C. D. Nielsen ◽

J. Staunstrup ◽

S. R. Jones

Keyword(s):

Neural Network

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A Learning Circuit That Operates by Discrete Means

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_33 ◽

1991 ◽

pp. 335-343

Author(s):

Paul Cockshott ◽

George Milne

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A New Architectural Approach to Flexible Digital Neural Network Chip Systems

VLSI for Artificial Intelligence and Neural Networks ◽

10.1007/978-1-4615-3752-6_31 ◽

1991 ◽

pp. 315-324 ◽

Cited By ~ 1

Author(s):

Torben Markussen

Keyword(s):

Neural Network

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VLSI for Artificial Intelligence and Neural NetworksLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer US

Incremental Garbage Collection Scheme in KL1 and Its Architectural Support of PIM

A VLSI Implementation of a Generic Systolic Synaptic Building Block for Neural Networks

Binary Neural Network with Delayed Synapses

A Cascadable VLSI Architecture for the Realization of Large Binary Associative Networks

The VLSI Implementation of the ∑ Architecture

Architectural Design of the Rewrite Rule Machine Ensemble

SIMD Parallelism for Symbol Mapping

A Delay-Insensitive Neural Network Engine

A Learning Circuit That Operates by Discrete Means

A New Architectural Approach to Flexible Digital Neural Network Chip Systems

VLSI for Artificial Intelligence and Neural Networks
Latest Publications