Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14

On Expressing Strategies for Directive-Driven Multicore Programing Models

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556870 ◽

2014 ◽

Author(s):

Ricardo Nobre ◽

Pedro Pinto ◽

Tiago Carvalho ◽

João M. P. Cardoso ◽

Pedro C. Diniz

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A cycle-accurate synthesizable MIPS simulator in Simulink

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556867 ◽

2014 ◽

Author(s):

Thomas Sideropoulos ◽

Nikos P. Pitsianis

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Extending a Run-time Resource Management framework to support OpenCL and Heterogeneous Systems

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556868 ◽

2014 ◽

Cited By ~ 6

Author(s):

Giuseppe Massari ◽

Chiara Caffarri ◽

Patrick Bellasi ◽

William Fornaciari

Keyword(s):

Resource Management ◽

Heterogeneous Systems ◽

Management Framework ◽

Run Time ◽

Time Resource

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Effective Platform-Level Exploration for Heterogeneous Multicores Exploiting Simulation-Induced Slacks

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556864 ◽

2014 ◽

Cited By ~ 6

Author(s):

Efstathios Sotiriou-Xanthopoulos ◽

Sotirios Xydis ◽

Kostas Siozios ◽

George Economakos ◽

Dimitrios Soudris

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Fine-Grained Link Locking Within Power and Latency Transaction Level Modelling in Wormhole Switching Non-Preemptive Networks On Chip

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556865 ◽

2014 ◽

Author(s):

James Harbin ◽

Leandro Soares Indrusiak

Keyword(s):

Networks On Chip ◽

Fine Grained ◽

Wormhole Switching ◽

Transaction Level ◽

On Chip

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Exploiting Performance Counters for Energy Efficient Co-Scheduling of Mixed Workloads on Multi-Core Platforms

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556866 ◽

2014 ◽

Cited By ~ 2

Author(s):

Simone Libutti ◽

Giuseppe Massari ◽

Patrick Bellasi ◽

William Fornaciari

Keyword(s):

Energy Efficient ◽

Performance Counters

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An Interactive Tool based on Polly for Detection and Parallelization of Loops

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14 ◽

10.1145/2556863.2556869 ◽

2014 ◽

Cited By ~ 2

Author(s):

Diana Göhringer ◽

Jan Tepelmann

Keyword(s):

Interactive Tool

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Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14
Latest Publications

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Published By ACM Press

On Expressing Strategies for Directive-Driven Multicore Programing Models

A cycle-accurate synthesizable MIPS simulator in Simulink

Extending a Run-time Resource Management framework to support OpenCL and Heterogeneous Systems

Effective Platform-Level Exploration for Heterogeneous Multicores Exploiting Simulation-Induced Slacks

Fine-Grained Link Locking Within Power and Latency Transaction Level Modelling in Wormhole Switching Non-Preemptive Networks On Chip

Exploiting Performance Counters for Energy Efficient Co-Scheduling of Mixed Workloads on Multi-Core Platforms

An Interactive Tool based on Polly for Detection and Parallelization of Loops

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Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

On Expressing Strategies for Directive-Driven Multicore Programing Models

A cycle-accurate synthesizable MIPS simulator in Simulink

Extending a Run-time Resource Management framework to support OpenCL and Heterogeneous Systems

Effective Platform-Level Exploration for Heterogeneous Multicores Exploiting Simulation-Induced Slacks

Fine-Grained Link Locking Within Power and Latency Transaction Level Modelling in Wormhole Switching Non-Preemptive Networks On Chip

Exploiting Performance Counters for Energy Efficient Co-Scheduling of Mixed Workloads on Multi-Core Platforms

An Interactive Tool based on Polly for Detection and Parallelization of Loops

Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '14
Latest Publications