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2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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TOTAL DOCUMENTS
17
(FIVE YEARS 0)
H-INDEX
1
(FIVE YEARS 0)
Published By IEEE
9780769546131, 9781467302210
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Latest Documents
Most Cited Documents
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Related Sources
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Keynote
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.6
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2011
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Tutorial
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.8
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2011
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Message from the Program Chairs
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.4
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2011
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Trace-Based Visualization as a Tool to Understand Applications' I/O Performance in Multi-core Machines
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.12
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2011
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Cited By ~ 1
Author(s):
Rodrigo Virote Kassick
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Francieli Zanon Boito
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Matthias Diener
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Philippe O.A. Navaux
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Yves Denneulin
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...
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Evaluating the Problem of Process Mapping on Network-on-Chip for Parallel Applications
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.13
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2011
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Cited By ~ 1
Author(s):
Cintia P. Avelar
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Poliana A.C. Oliveira
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Henrique C. Freitas
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Philippe O.A. Navaux
Keyword(s):
Network On Chip
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Parallel Applications
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Process Mapping
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On Chip
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Author index
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.15
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2011
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Title Page iii
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.2
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2011
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Keyword(s):
Title Page
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Economical Two-fold Working Precision Matrix Multiplication on Consumer-Level CUDA GPUs
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.18
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2011
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Cited By ~ 1
Author(s):
Noriyuki Fujimoto
Keyword(s):
Matrix Multiplication
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Precision Matrix
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Adaptive Power Optimization of On-chip SNUCA Cache on Tiled Chip Multicore Architecture Using Remap Policy
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.14
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2011
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Author(s):
Aparna Mandke
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Bharadwaj Amrutur
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Y.N. Srikant
Keyword(s):
Power Optimization
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Multicore Architecture
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Adaptive Power
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On Chip
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Publisher's Information
2011 Second Workshop on Architecture and Multi-Core Applications (wamca 2011)
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10.1109/wamca.2011.16
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2011
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