Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC)

2013 ◽  
Vol 66 (3) ◽  
pp. 1507-1532 ◽  
Author(s):  
Akram Ben Ahmed ◽  
Abderazek Ben Abdallah
Keyword(s):  
High Throughput ◽  
Fault Tolerant ◽  
Routing Algorithm ◽  
Network On Chip ◽  
Low Latency ◽  
3D Network ◽  
On Chip ◽  
Architecture And Design

Design of Router Supporting Multiply Routing Algorithm for NoC

2014 ◽  
Vol 981 ◽  
pp. 431-434
Author(s):  
Zhan Peng Jiang ◽  
Rui Xu ◽  
Chang Chun Dong ◽  
Lin Hai Cui
Keyword(s):  
Complex System ◽  
High Performance ◽  
Routing Algorithm ◽  
Network On Chip ◽  
System On Chip ◽  
Low Latency ◽  
Deterministic Routing ◽  
Key Features ◽  
Design Challenge ◽  
On Chip

Network on Chip(NoC)，a new proposed solution to solve global communication problem in complex System on Chip (SoC) design，has absorbed more and more researchers to do research in this area. Due to some distinct characteristics, NoC is different from both traditional off-chip network and traditional on-chip bus，and is facing with the huge design challenge. NoC router design is one of the most important issues in NoC system. The paper present a high-performance, low-latency two-stage pipelined router architecture suitable for NoC designs and providing a solution to irregular 2Dmesh topology for NoC. The key features of the proposed Mix Router are its suitability for 2Dmesh NoC topology and its capability of suorting both full-adaptive routing and deterministic routing algorithm.

Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems

2017 ◽  
Vol 28 (3) ◽  
pp. 838-849 ◽  
Author(s):  
Yu-Yin Chen ◽  
En-Jui Chang ◽  
Hsien-Kai Hsin ◽  
Kun-Chih Chen ◽  
An-Yeu Andy Wu
Keyword(s):  
Fault Tolerant ◽  
Routing Algorithm ◽  
Network On Chip ◽  
Path Diversity ◽  
On Chip

scholarly journals Formal Analysis of a Fault-Tolerant Routing Algorithm for a Network-on-Chip

2014 ◽  
pp. 48-62 ◽  
Author(s):  
Zhen Zhang ◽  
Wendelin Serwe ◽  
Jian Wu ◽  
Tomohiro Yoneda ◽  
Hao Zheng ◽  
...  
Keyword(s):  
Fault Tolerant ◽  
Formal Analysis ◽  
Routing Algorithm ◽  
Network On Chip ◽  
On Chip
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