System-on-chip integrated circuit technology applications on the DIII-D tokamak for multi-field measurements

Several mm-wave diagnostics on the DIII-D tokamak provide multi-scale and multi-dimensional measurements of plasma profile evolution and turbulence fluctuations. Mm-wave fusion plasma diagnostics that adopt system-on-chip integrated circuit technology can provide better space utilization, flexible installation, and improved sensitivity. In order to further extend this technology for additional fusion facilities with a higher toroidal magnetic field, V-band (55–75 GHz) and F-band (90–140 GHz) chips for Microwave Imaging Reflectometer (MIR) and Electron Cyclotron Emission Imaging (ECEI) instruments are developed and tested in the Davis Millimeter Wave Research Center (DMRC). Current measurement data show that correlation between these SoC-based diagnostic instruments with other state-of-the-art diagnostics enables co-located multi-field turbulence fluctuation measurement.

Telecontrolling pada Kandang Jangkrik Berbasis IoT (Internet of Things)

Jangkrik adalah jenis serangga yang unik, memiliki suara khas dan aktif pada malam hari, jangkrik banyak dibudidayakan oleh masyarakat karena dapat menjadi penompang perekonomian masyarakat baik untuk pakan binatang piaraan,campuran pakan ternak,bahan tambahan pangan hingga campuran kosmetik. Aspek yang perlu di perhatikan dalam pembudidayaan jangkrik yaitu faktor lingkungan yang mempengaruhi hidup dan pertumbuhan jangkrik sehari-hari adalah dari sumber nutrisi,suhu dan kelembapan.Maka dari itu dibuatlah alat “Telecontrolling Pada Kandang Jangkrik Berbasis IoT (Internet of Things)”Alat ini menggunakan sensor DHT22 dan RTC untuk mengukur suhu dan kelembapan didalam kandang jangkrik dan RTC untuk mendeteksi waktu. Input data sensor akan diolah oleh ESP32 yang merupakan System on Chip dengan Wi-Fi dan Bluetooth, kemudian di deteksi oleh Fuzzy Logic untuk menentukan output pengaktifannya dan kapan ternak jangkrik waktunya panen akan dikirim melalui aplikasi telegram.Hasil perancangan sistem untuk kontrol dan monitoring berhasil diterapkan pada kandang jangkrik dengan berdasarkan suhu, kelembapan dan waktu. Sistem dapat mengirimkan notifikasi output dan respon sesuai dengan kondisi yang telah ditentukan dengan aplikasi telegram dan penyimpanan data pada website. Pengujian akurasi sensor mendapatkan hasil presentasi ketelitian yang cukup akurat, yaitu pada rata-rata presentase akurasi suhu mendapat milai 98% dan pada kelembapan mendapatkan nilai 97%, dan Pengujian hasil presentase akurasi pada sistem dan simulasi fuzzy dengan menggunakan aplikasi telegram dan matlab mendapatkan nilai presentase akurasi 31,66%.

RISC-V Based Safety System-on-Chip with Hardware Comparator

In this paper, a Safety System-on-Chip based on the open-source RISC-V processor SweRV EH1 from Western Digital is presented. A hardware comparator concept is followed. The SSoC is implemented on a Xilinx FPGA system and extended with standard peripherals from the Xilinx IP library and from Cobham Gaisler, so that the overall system has an Ethernet interface in addition to GPIO and UART. The goal is to create a complete redundancy approach with a hardware fault tolerance of nearly 1 from input to output based on the freely available RISC-V instruction set and prove its feasibility.

Design of Interplanetary Observation Terminal based on All Programmable System-on-Chip

The drastic changes in the solar wind will cause serious harm to human life. Monitoring interplanetary scintillation (IPS) can predict solar wind activity, thereby effectively reducing the harm caused by space weather. Aiming at the problem of the lack of the ability to observe IPS phenomenon of the 40-meter radio telescope at the Yunnan Astronomical Observatory of China in the frequency band around 300MHz, an IPS real-time acquisition and processing scheme based on all programmable system-on-chip(APSoC) was proposed. The system calculates the average power of 10ms IPS signal in PL-side and transmits it to the system memory through AXI4 bus. PS-side reads the data, takes logarithms, packages it, and finally transmits it to the LabVIEW host computer through gigabit Ethernet UDP mode for display and storage. Experimental tests show that the system functions correctly, and the PL-side power consumption is only 1.955 W, with a high time resolution of 10ms, and no data is lost in 24 hours of continuous observation, with good stability. The system has certain application value in IPS observation.

Towards an Ontology-driven Intellectual Properties reuse for Systems On Chip design

Intellectual Properties reuse has gained widespread acceptance in System-On-Chip design to manage the complexity and shorten the time-to-market. However the need for a standard representation that permits IPs classification, characterization, and integration is still a big challenge. To address this problem, we propose to develop an IPs reuse specific ontology that facilitates IPs reuse at many levels of abstraction and independently from any design language or tool. Our ontology is built using the Protégé-OWL tool