Cross-architecture prediction based scheduling for energy efficient execution on single-ISA heterogeneous chip-multiprocessors

Microprocessors and Microsystems ◽

10.1016/j.micpro.2015.04.008 ◽

2015 ◽

Vol 39 (4-5) ◽

pp. 271-285 ◽

Author(s):

Ying Zhang ◽

Lide Duan ◽

Bin Li ◽

Lu Peng ◽

Srinivasan Sadagopan

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Efficient Execution

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NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines

2018 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2018.8351128 ◽

2018 ◽

Author(s):

Pooneh Safayenikoo ◽

Arghavan Asad ◽

Mahmood Fathy ◽

Farah Mohammadi

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Cache Architecture

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Application configuration selection for energy-efficient execution on multicore systems

Journal of Parallel and Distributed Computing ◽

10.1016/j.jpdc.2015.09.003 ◽

2016 ◽

Vol 87 ◽

pp. 43-54 ◽

Author(s):

Shinan Wang ◽

Bing Luo ◽

Weisong Shi ◽

Devesh Tiwari

Keyword(s):

Energy Efficient ◽

Multicore Systems ◽

Configuration Selection ◽

Selection For ◽

Efficient Execution

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Notice of Violation of IEEE Publication Principles: An Energy-Efficient Heterogeneous Memory Architecture for Future Dark Silicon Embedded Chip-Multiprocessors

IEEE Transactions on Emerging Topics in Computing ◽

10.1109/tetc.2016.2563323 ◽

2019 ◽

pp. 1-1 ◽

Author(s):

Salman Onsori ◽

Arghavan Asad ◽

Kaamran Raahemifar ◽

Mahmood Fathy

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Memory Architecture ◽

Dark Silicon ◽

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Energy-Efficient Execution for Repetitive App Usages on big.LITTLE Architectures

Proceedings of the 54th Annual Design Automation Conference 2017 on - DAC '17 ◽

10.1145/3061639.3062239 ◽

2017 ◽

Author(s):

Xianfeng Li ◽

Guikang Chen ◽

Wen Wen

Keyword(s):

Energy Efficient ◽

Efficient Execution

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A Heterogeneous and Reconfigurable Embedded Architecture for Energy-Efficient Execution of Convolutional Neural Networks

Architecture of Computing Systems – ARCS 2019 - Lecture Notes in Computer Science ◽

10.1007/978-3-030-18656-2_20 ◽

2019 ◽

pp. 267-280

Author(s):

Konstantin Lübeck ◽

Oliver Bringmann

Keyword(s):

Neural Networks ◽

Convolutional Neural Networks ◽

Energy Efficient ◽

Embedded Architecture ◽

Efficient Execution

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Using STT-RAM to enable energy-efficient near-threshold chip multiprocessors

Proceedings of the 23rd international conference on Parallel architectures and compilation - PACT '14 ◽

10.1145/2628071.2628132 ◽

2014 ◽

Author(s):

Xiang Pan ◽

Radu Teodorescu

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

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Tools and methodologies for designing energy-efficient photonic networks-on-chip for highperformance chip multiprocessors

Proceedings of 2010 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2010.5537792 ◽

2010 ◽

Author(s):

Johnnie Chan ◽

Gilbert Hendry ◽

Aleksandr Biberman ◽

Keren Bergman

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Photonic Networks ◽

Networks On Chip ◽

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Energy-efficient fault tolerance in chip multiprocessors using Critical Value Forwarding

2010 IEEE/IFIP International Conference on Dependable Systems & Networks (DSN) ◽

10.1109/dsn.2010.5544918 ◽

2010 ◽

Author(s):

Pramod Subramanyan ◽

Virendra Singh ◽

Kewal K. Saluja ◽

Erik Larsson

Keyword(s):

Fault Tolerance ◽

Energy Efficient ◽

Chip Multiprocessors ◽

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Energy efficient execution of heterogeneous applications

10.17760/d20262473 ◽

2017 ◽

Author(s):

Baruah

Keyword(s):

Energy Efficient ◽

Efficient Execution

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An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses

2018 IEEE Canadian Conference on Electrical & Computer Engineering (CCECE) ◽

10.1109/ccece.2018.8447736 ◽

2018 ◽

Author(s):

Pooneh Safayenikoo ◽

Arghavan Asad ◽

Farah Mohammadi

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Cache Architecture

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