scholarly journals A Distributed Shared Memory Model and C++ Templated Meta-Programming Interface for the Epiphany RISC Array Processor

2017 ◽  
Vol 108 ◽  
pp. 1093-1102 ◽  
Author(s):  
David Richie ◽  
James Ross ◽  
Jamie Infantolino
2001 ◽  
Vol 11 (01) ◽  
pp. 65-76
Author(s):  
LUCIANA ARANTES ◽  
DENIS POITRENAUD ◽  
PIERRE SENS ◽  
BERTIL FOLLIOT

In this article, we introduce a new logical clock, the barrier-lock clock, whose conception is based on the lazy release consistency memory model (LRC) supported by several distributed shared memory (DSM) systems. Since in the LRC, the propagation of shared memory updates performed by the processes of a parallel application is induced by lock and barrier operations, our logical clock has been modeled on those operations. Each barrier-lock times-tamp encodes the synchronization operation with which it is associated. Its size is not dependent on the number of processes of the system, as the traditional logical vector clocks, but it is proportional to the number of locks. The barrier-lock time characterizes the causality of shared memory updates performed by processes of a parallel application running on a LRC-based DSM system. A formal proof and experimental tests have confirmed such property.


2010 ◽  
Vol 38 (1) ◽  
pp. 347-358 ◽  
Author(s):  
Isaac Gelado ◽  
John E. Stone ◽  
Javier Cabezas ◽  
Sanjay Patel ◽  
Nacho Navarro ◽  
...  

2010 ◽  
pp. NA-NA ◽  
Author(s):  
Hiroaki Umeda ◽  
Yuichi Inadomi ◽  
Toshio Watanabe ◽  
Toru Yagi ◽  
Takayoshi Ishimoto ◽  
...  

2010 ◽  
Vol 45 (3) ◽  
pp. 347-358 ◽  
Author(s):  
Isaac Gelado ◽  
John E. Stone ◽  
Javier Cabezas ◽  
Sanjay Patel ◽  
Nacho Navarro ◽  
...  

2020 ◽  
Vol 30 (2) ◽  
pp. 1-26 ◽  
Author(s):  
Matteo Principe ◽  
Tommaso Tocci ◽  
Pierangelo Di Sanzo ◽  
Francesco Quaglia ◽  
Alessandro Pellegrini

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