Dynamic redundancy identification in automatic test generation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.124427 ◽

1992 ◽

Vol 11 (3) ◽

pp. 404-407 ◽

Author(s):

M. Abramovici ◽

D.T. Miller ◽

R.K. Roy

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

Automatic Test ◽

Redundancy Identification

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Dynamic redundancy identification in automatic test generation

1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers ◽

10.1109/iccad.1989.76992 ◽

2003 ◽

Author(s):

M. Abramovici ◽

D.T. Miller ◽

R.K. Roy

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

Automatic Test ◽

Redundancy Identification

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qATG: Automatic Test Generation for Quantum Circuits

2020 IEEE International Test Conference (ITC) ◽

10.1109/itc44778.2020.9325228 ◽

2020 ◽

Author(s):

Chen-Hung Wu ◽

Cheng-Yun Hsieh ◽

Jiun-Yun Li ◽

James Chien-Mo Li

Keyword(s):

Test Generation ◽

Quantum Circuits ◽

Automatic Test Generation ◽

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Automatic Test Generation for Model-Based Code Generators

Second International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (isola 2006) ◽

10.1109/isola.2006.70 ◽

2006 ◽

Author(s):

Sergey V. Zelenov ◽

Denis V. Silakov ◽

Alexander K. Petrenko ◽

Mirko Conrad ◽

Ines Fey

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

Automatic Test ◽

Model Based ◽

Code Generators

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A review of analog automatic test generation

10.1109/autest.1978.764226 ◽

2005 ◽

Author(s):

H.H. Schreiber

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

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Automatic Test Generation for Digital Electronic Circuits

AT&T Technical Journal ◽

10.1002/j.1538-7305.1994.tb00575.x ◽

1994 ◽

Vol 73 (2) ◽

pp. 19-29 ◽

Author(s):

Tapan J. Chakraborty ◽

Scott Davidson ◽

Fadi Maamari ◽

Kwang-Ting Cheng

Keyword(s):

Test Generation ◽

Electronic Circuits ◽

Automatic Test Generation ◽

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An Automatic Test Generation Method for Crosstalk Delay Faults Using Modified FAN Algorithm

Test Generation of Crosstalk Delay Faults in VLSI Circuits ◽

10.1007/978-981-13-2493-2_4 ◽

2018 ◽

pp. 57-77

Author(s):

S. Jayanthy ◽

M. C. Bhuvaneswari

Keyword(s):

Test Generation ◽

Delay Faults ◽

Automatic Test Generation ◽

Automatic Test ◽

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Validation and automatic test generation on UML models

Electronic Notes in Theoretical Computer Science ◽

10.1016/s1571-0661(04)80402-x ◽

2002 ◽

Vol 66 (2) ◽

pp. 33-49 ◽

Author(s):

David Lugato ◽

Céline Bigot ◽

Yannick Valot

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

Automatic Test ◽

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Automatic test generation for mutation testing on database applications

2013 8th International Workshop on Automation of Software Test (AST) ◽

10.1109/iwast.2013.6595801 ◽

2013 ◽

Author(s):

Kai Pan ◽

Xintao Wu ◽

Tao Xie

Keyword(s):

Test Generation ◽

Mutation Testing ◽

Automatic Test Generation ◽

Automatic Test ◽

Database Applications

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Automatic Test Generation for Stuck-Open Faults in CMOS VLSI

10.1109/dac.1981.1585380 ◽

1981 ◽

Author(s):

Y.M. Elzig

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

Automatic Test ◽

Open Faults ◽

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Iterative automatic test generation method for telecommunication protocols

Computer Standards & Interfaces ◽

10.1016/j.csi.2005.04.002 ◽

2006 ◽

Vol 28 (4) ◽

pp. 412-427

Author(s):

G. Kovács ◽

Z. Pap ◽

G. Csopaki ◽

K. Tarnay

Keyword(s):

Test Generation ◽

Automatic Test Generation ◽

Automatic Test ◽

Telecommunication Protocols

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